summaryrefslogtreecommitdiffstats
path: root/PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod
diff options
context:
space:
mode:
Diffstat (limited to 'PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod')
-rw-r--r--PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod38
1 files changed, 38 insertions, 0 deletions
diff --git a/PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod b/PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod
new file mode 100644
index 00000000..2fd201a4
--- /dev/null
+++ b/PCB/Main Boards/OSO-SWAT-C1/OSO-SWAT-C1.pretty/_0603MP.kicad_mod
@@ -0,0 +1,38 @@
+(footprint "_0603MP" (version 20211014) (generator pcbnew)
+ (layer "F.Cu")
+ (tedit 0)
+ (descr "<b>0603 MicroPitch</b>")
+ (fp_text reference "REF**" (at -0.9525 -0.635) (layer "F.SilkS")
+ (effects (font (size 0.666496 0.666496) (thickness 0.146304)) (justify left bottom))
+ (tstamp a1f3b960-720c-4050-8c7b-e4fb81f7c447)
+ )
+ (fp_text value ">VALUE" (at -0.9525 0.9525) (layer "F.Fab")
+ (effects (font (size 0.36576 0.36576) (thickness 0.04064)) (justify left bottom))
+ (tstamp f7454cc9-a5be-454b-b5bb-decc69423e09)
+ )
+ (fp_poly (pts
+ (xy -0.1999 0.25)
+ (xy 0.1999 0.25)
+ (xy 0.1999 -0.25)
+ (xy -0.1999 -0.25)
+ ) (layer "F.Adhes") (width 0) (fill solid) (tstamp 23d6168b-6030-48a2-96be-111de678cbf9))
+ (fp_line (start 0 -0.254) (end 0 0.254) (layer "F.SilkS") (width 0.2032) (tstamp ebb6e458-b901-41c0-b269-52de840ade47))
+ (fp_line (start -0.432 0.306) (end 0.432 0.306) (layer "F.Fab") (width 0.1016) (tstamp 0ff59386-9f8f-4bc5-871b-4804e001e34f))
+ (fp_line (start 0.432 -0.306) (end -0.432 -0.306) (layer "F.Fab") (width 0.1016) (tstamp c1b693b3-0c6a-47f3-bd85-e73de386676a))
+ (fp_poly (pts
+ (xy 0.4318 0.4)
+ (xy 0.8 0.4)
+ (xy 0.8 -0.4)
+ (xy 0.4318 -0.4)
+ ) (layer "F.Fab") (width 0) (fill solid) (tstamp 98d6e8c0-7c85-4056-b142-5a49d5f78f6a))
+ (fp_poly (pts
+ (xy -0.8 0.4)
+ (xy -0.4318 0.4)
+ (xy -0.4318 -0.4)
+ (xy -0.8 -0.4)
+ ) (layer "F.Fab") (width 0) (fill solid) (tstamp c67e1e1d-f03c-4cd2-855a-6f77ed9840d4))
+ (pad "1" smd rect (at -0.762 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask")
+ (solder_mask_margin 0.0635) (tstamp 261178c6-668c-4d25-9316-e97dc5e52e2d))
+ (pad "2" smd rect (at 0.762 0) (size 0.8 0.8) (layers "F.Cu" "F.Paste" "F.Mask")
+ (solder_mask_margin 0.0635) (tstamp aece925f-4ef2-4a3b-a64c-72600b766d22))
+)