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#include "project.h"
#define BUFFER_SIZE 256
#define BIG_BUFFER_SIZE 600
volatile ring_t rx3_ring;
static uint8_t rx3_ring_buf[BUFFER_SIZE];
volatile ring_t tx3_ring;
static uint8_t tx3_ring_buf[BUFFER_SIZE];
volatile ring_t rx1_ring;
static uint8_t rx1_ring_buf[BUFFER_SIZE];
volatile ring_t tx1_ring;
static uint8_t tx1_ring_buf[BUFFER_SIZE];
#define TX1 GPIO9
#define TX1_PORT GPIOA
#define RX1 GPIO10
#define RX1_PORT GPIOA
#define TX3 GPIO10
#define TX3_PORT GPIOC
#define RX3 GPIO11
#define RX3_PORT GPIOC
void usart3_isr (void)
{
uint8_t data;
/* Check if we were called because of RXNE. */
if (((USART_CR1 (USART3) & USART_CR1_RXNEIE) != 0) &&
((USART_SR (USART3) & USART_SR_RXNE) != 0)) {
/* Retrieve the data from the peripheral. */
data = usart_recv (USART3);
ring_write_byte (&rx3_ring, data);
//usart6_queue(data);
}
/* Check if we were called because of TXE. */
if (((USART_CR1 (USART3) & USART_CR1_TXEIE) != 0) &&
((USART_SR (USART3) & USART_SR_TXE) != 0)) {
if (ring_read_byte (&tx3_ring, &data)) {
/*No more data, Disable the TXE interrupt, it's no longer needed. */
usart_disable_tx_interrupt (USART3);
} else
usart_send_blocking (USART3, data);
}
}
void
usart3_queue (uint8_t d)
{
ring_write_byte (&tx3_ring, d);
usart_enable_tx_interrupt (USART3);
}
void
usart3_drain (void)
{
while (!ring_empty (&tx3_ring));
}
int
usart3_write (char *ptr, int len, int blocking)
{
int ret;
ret = ring_write (&tx3_ring, (uint8_t *) ptr, len, blocking);
usart_enable_tx_interrupt (USART3);
return ret;
}
void usart1_isr (void)
{
uint8_t data;
/* Check if we were called because of RXNE. */
if (((USART_CR1 (USART1) & USART_CR1_RXNEIE) != 0) &&
((USART_SR (USART1) & USART_SR_RXNE) != 0)) {
/* Retrieve the data from the peripheral. */
data = usart_recv (USART1);
ring_write_byte (&rx1_ring, data);
}
/* Check if we were called because of TXE. */
if (((USART_CR1 (USART1) & USART_CR1_TXEIE) != 0) &&
((USART_SR (USART1) & USART_SR_TXE) != 0)) {
if (ring_read_byte (&tx1_ring, &data)) {
/*No more data, Disable the TXE interrupt, it's no longer needed. */
usart_disable_tx_interrupt (USART1);
} else
usart_send_blocking (USART1, data);
}
}
void
usart1_queue (uint8_t d)
{
ring_write_byte (&tx1_ring, d);
usart_enable_tx_interrupt (USART1);
}
void
usart1_drain (void)
{
while (!ring_empty (&tx1_ring));
}
int
usart1_write (char *ptr, int len, int blocking)
{
int ret;
ret = ring_write (&tx1_ring, (uint8_t *) ptr, len, blocking);
usart_enable_tx_interrupt (USART1);
return ret;
}
void
usart_init (void)
{
ring_init (&rx3_ring, rx3_ring_buf, sizeof (rx3_ring_buf));
ring_init (&tx3_ring, tx3_ring_buf, sizeof (tx3_ring_buf));
MAP_AF (TX3, GPIO_AF7);
MAP_AF_PU (RX3, GPIO_AF7);
usart_set_baudrate (USART3, 9600);
usart_set_databits (USART3, 8);
usart_set_stopbits (USART3, USART_STOPBITS_1);
usart_set_parity (USART3, USART_PARITY_NONE);
usart_set_flow_control (USART3, USART_FLOWCONTROL_NONE);
usart_set_mode (USART3, USART_MODE_TX_RX);
usart_enable_rx_interrupt (USART3);
usart_enable (USART3);
nvic_enable_irq (NVIC_USART3_IRQ);
ring_init (&rx1_ring, rx1_ring_buf, sizeof (rx1_ring_buf));
ring_init (&tx1_ring, tx1_ring_buf, sizeof (tx1_ring_buf));
MAP_AF (TX1, GPIO_AF7);
MAP_AF_PU (RX1, GPIO_AF7);
usart_set_baudrate (USART1, 38400);
usart_set_databits (USART1, 8);
usart_set_stopbits (USART1, USART_STOPBITS_1);
usart_set_parity (USART1, USART_PARITY_NONE);
usart_set_flow_control (USART1, USART_FLOWCONTROL_NONE);
usart_set_mode (USART1, USART_MODE_TX_RX);
usart_enable_rx_interrupt (USART1);
usart_enable (USART1);
nvic_enable_irq (NVIC_USART1_IRQ);
}
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