| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | add mdns responder | root | 2021-03-20 | 1 | -2/+6 |
| * | handle non contiguous frames on ethernet transmit | root | 2021-03-20 | 1 | -5/+31 |
| * | now we have muticies, handle more than one frame per interrupt | root | 2021-03-19 | 1 | -1/+2 |
| * | switch to lwip-2.1.2 | root | 2021-03-19 | 1 | -7/+5 |
| * | working, with hybrid FLL/PLL, new refclk input and support for max7219 displa... | root | 2021-03-02 | 1 | -141/+173 |
| * | works | root | 2021-02-26 | 1 | -2/+29 |
| * | sysclk back to 168MHz, 10Mhz -> TIM2old-master | fishsoupisgood | 2019-05-08 | 1 | -2/+5 |
| * | cut #1 | fishsoupisgood | 2019-05-04 | 1 | -1/+12 |
| * | switch to stlink, blinky | root | 2019-02-22 | 1 | -42/+44 |
| * | use OCXO, and auto fail-over between different clock sources | fishsoupisgood | 2019-02-20 | 1 | -3/+3 |
| * | Working | root | 2019-02-19 | 1 | -37/+40 |
| * | everything working, even with fucked phy | root | 2019-02-19 | 1 | -289/+258 |
| * | working ethernet | root | 2019-02-19 | 1 | -98/+157 |
| * | remember old steth | root | 2019-02-19 | 1 | -12/+73 |
| * | happy dcf77 better pll, and stamps for long term stability | root | 2018-04-17 | 1 | -1/+6 |
| * | working decoding | root | 2018-04-08 | 1 | -0/+366 |
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index : stm32/clock | |
| code for gps/dcf77/msf clock | James |
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