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* sysclk back to 168MHz, 10Mhz -> TIM2old-masterfishsoupisgood2019-05-0813-86/+300
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* switch to 10MHz system clockfishsoupisgood2019-05-042-61/+148
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* cut #1fishsoupisgood2019-05-0428-229/+2277
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* fishJames2019-02-251-1/+1
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* switch to stlink, blinkyroot2019-02-2215-82/+194
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* add edge magicfishsoupisgood2019-02-213-7/+17
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* use OCXO, and auto fail-over between different clock sourcesfishsoupisgood2019-02-2011-48/+109
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* fix offsetsroot2019-02-196-45/+54
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* Workingroot2019-02-1912-436/+650
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* everything working, even with fucked phyroot2019-02-1913-389/+509
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* working ethernetroot2019-02-1925-174/+1712
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* remember old stethroot2019-02-191-12/+73
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* happy dcf77 better pll, and stamps for long term stabilityroot2018-04-179-89/+148
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* working decodingroot2018-04-0845-0/+3088