1 files changed, 17 insertions, 62 deletions
diff --git a/boot/bootloader.c b/boot/bootloader.c
index a5932f0..3bc7344 100644
--- a/boot/bootloader.c
+++ b/boot/bootloader.c
@@ -25,69 +25,23 @@
 
 
 static const clock_scale_t hsi_16mhz_3v3_48 = {
-  /* 48MHz */
-  .pllm = 16,
-  .plln = 96,
-  .pllp = 2,
-  .pllq = 2,
-  .hpre = RCC_CFGR_HPRE_DIV_NONE,
-  .ppre1 = RCC_CFGR_PPRE_DIV_4,
-  .ppre2 = RCC_CFGR_PPRE_DIV_2,
-  .power_save = 1,
-  .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
-  FLASH_ACR_LATENCY_3WS,
-  .apb1_frequency = 12000000,
-  .apb2_frequency = 24000000,
+		.pllm = 16,
+		.plln = 96,
+		.pllp = 2,
+		.pllq = 2,
+		.pllr = 0,
+		.pll_source = RCC_CFGR_PLLSRC_HSI_CLK,
+		.hpre = RCC_CFGR_HPRE_NODIV,
+		.ppre1 = RCC_CFGR_PPRE_DIV4,
+		.ppre2 = RCC_CFGR_PPRE_DIV2,
+		.voltage_scale = PWR_SCALE1,
+		.flash_config = FLASH_ACR_DCEN | FLASH_ACR_ICEN |
+				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 48000000,
+		.apb1_frequency = 12000000,
+		.apb2_frequency = 24000000,
 };
 
-static void rcc_clock_setup_hsi_3v3 (const clock_scale_t *clock)
-{
-
-  /* Enable internal high-speed oscillator. */
-  rcc_osc_on (HSI);
-  rcc_wait_for_osc_ready (HSI);
-
-  /* Select HSI as SYSCLK source. */
-  rcc_set_sysclk_source (RCC_CFGR_SW_HSI);
-  rcc_wait_for_sysclk_status (HSI);
-
-  rcc_osc_off (PLL);
-
-  while (RCC_CR & RCC_CR_PLLRDY);
-
-  pwr_set_vos_scale (SCALE1);
-
-  /*
-   * Set prescalers for AHB, ADC, ABP1, ABP2.
-   * Do this before touching the PLL (TODO: why?).
-   */
-  rcc_set_hpre (clock->hpre);
-  rcc_set_ppre1 (clock->ppre1);
-  rcc_set_ppre2 (clock->ppre2);
-
-  rcc_set_main_pll_hsi (clock->pllm, clock->plln,
-                        clock->pllp, clock->pllq);
-
-  /* Enable PLL oscillator and wait for it to stabilize. */
-  rcc_osc_on (PLL);
-  rcc_wait_for_osc_ready (PLL);
-
-  /* Configure flash settings. */
-  flash_set_ws (clock->flash_config);
-
-  /* Select PLL as SYSCLK source. */
-  rcc_set_sysclk_source (RCC_CFGR_SW_PLL);
-
-  /* Wait for PLL clock to be selected. */
-  rcc_wait_for_sysclk_status (PLL);
-
-  /* Set the peripheral clock frequencies used. */
-  rcc_apb1_frequency = clock->apb1_frequency;
-  rcc_apb2_frequency = clock->apb2_frequency;
-
-}
-
-
 int main (void)
 {
 
@@ -126,7 +80,8 @@ int main (void)
 
   rcc_periph_clock_enable (RCC_SYSCFG);
 
-  rcc_clock_setup_hsi_3v3 (&hsi_16mhz_3v3_48);
+
+  rcc_clock_setup_pll (&hsi_16mhz_3v3_48);
 
   RCC_AHB1RSTR |= RCC_AHB1RSTR_ETHMACRST;
   RCC_AHB2RSTR |= RCC_AHB2RSTR_OTGFSRST;