diff options
Diffstat (limited to 'app/main.c')
| -rw-r--r-- | app/main.c | 160 |
1 files changed, 148 insertions, 12 deletions
@@ -2,12 +2,24 @@ int time_known; +#if 0 +void exti15_10_isr (void) +{ + nvic_disable_irq (NVIC_EXTI15_10_IRQ); + + if (exti_get_flag_status (EXTI10)) exti10_isr(); + + if (exti_get_flag_status (EXTI11)) exti11_isr(); + + nvic_enable_irq (NVIC_EXTI15_10_IRQ); +} +#endif static void cmd_dispatch (void) { uint8_t c; - while (!ring_read_byte (&rx1_ring, &c)) { + while (!ring_read_byte (&rx2_ring, &c)) { printf ("KEY> %c\r\n", c); @@ -21,8 +33,13 @@ static void cmd_dispatch (void) gps_reset(); break; + case 'I': + gps_bs(); + break; + case 'A': - gps_almanac(); + //gps_almanac(); + gps_dump_almanac(); break; } } @@ -43,7 +60,123 @@ static const clock_scale_t hse_10mhz_3v3_168 = { .apb2_frequency = 84000000, }; +static const clock_scale_t hse_10mhz_3v3_120 = { + /* 120 */ + .pllm = 10, + .plln = 240, + .pllp = 2, + .pllq = 5, + .hpre = RCC_CFGR_HPRE_DIV_NONE, + .ppre1 = RCC_CFGR_PPRE_DIV_4, + .ppre2 = RCC_CFGR_PPRE_DIV_2, + .power_save = 1, + .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE | + FLASH_ACR_LATENCY_3WS, + .apb1_frequency = 30000000, + .apb2_frequency = 60000000, +}; + +static const clock_scale_t hse_10mhz_3v3_84 = { + .pllm = 10, + .plln = 336, + .pllp = 4, + .pllq = 7, + .hpre = RCC_CFGR_HPRE_DIV_NONE, + .ppre1 = RCC_CFGR_PPRE_DIV_2, + .ppre2 = RCC_CFGR_PPRE_DIV_NONE, + .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE | + FLASH_ACR_LATENCY_2WS, + .apb1_frequency = 42000000, + .apb2_frequency = 84000000, +}; + + +static const clock_scale_t hse_10mhz_3v3_48 = { + .pllm = 10, + .plln = 96, + .pllp = 2, + .pllq = 2, + .hpre = RCC_CFGR_HPRE_DIV_NONE, + .ppre1 = RCC_CFGR_PPRE_DIV_4, + .ppre2 = RCC_CFGR_PPRE_DIV_2, + .power_save = 1, + .flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE | + FLASH_ACR_LATENCY_3WS, + .apb1_frequency = 12000000, + .apb2_frequency = 24000000, +}; + +static void pd_port (uint32_t p) +{ + unsigned c; + + for (c = 0; c < 32; ++c) { + + if ((p == GPIOA) && ((c == 13) || (c == 14))) continue; + + gpio_mode_setup (p, GPIO_MODE_INPUT, GPIO_PUPD_NONE, 1UL << c); + } +} + + +static void pd_clear (uint32_t g, uint32_t b) +{ + gpio_mode_setup (g, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, b); + gpio_set_output_options (g, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, b); + gpio_clear (g, b); +} + + +static void pd_set (uint32_t g, uint32_t b) +{ + gpio_mode_setup (g, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, b); + gpio_set_output_options (g, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, b); + gpio_set (g, b); +} + + +static void pd(void) +{ + pd_port (GPIOA); + pd_port (GPIOB); + pd_port (GPIOC); + pd_port (GPIOD); + pd_port (GPIOE); + pd_port (GPIOF); + pd_port (GPIOG); + + pd_set (GPIOB, GPIO10); + + pd_set (GPIOG, GPIO4); + pd_set (GPIOD, GPIO10); + + pd_set (GPIOD, GPIO1); + pd_set (GPIOB, GPIO13); + + pd_set (GPIOE, GPIO3); + pd_set (GPIOE, GPIO4); + + + rcc_periph_clock_disable (RCC_ETHMACPTP); + rcc_periph_clock_disable (RCC_ETHMACRX); + rcc_periph_clock_disable (RCC_ETHMACTX); + rcc_periph_clock_disable (RCC_ETHMAC); + rcc_periph_clock_disable (RCC_USART2); + rcc_periph_clock_disable (RCC_USART1); + rcc_periph_clock_disable (RCC_GPIOG); + rcc_periph_clock_disable (RCC_GPIOF); + rcc_periph_clock_disable (RCC_GPIOE); + rcc_periph_clock_disable (RCC_GPIOD); + rcc_periph_clock_disable (RCC_GPIOC); + rcc_periph_clock_disable (RCC_GPIOB); + rcc_periph_clock_disable (RCC_GPIOA); + rcc_periph_clock_disable (RCC_SYSCFG); + + + + for (;;); +} static void board_setup (void) @@ -58,22 +191,24 @@ board_setup (void) rcc_periph_clock_enable (RCC_GPIOC); rcc_periph_clock_enable (RCC_GPIOD); rcc_periph_clock_enable (RCC_GPIOE); + rcc_periph_clock_enable (RCC_GPIOF); + rcc_periph_clock_enable (RCC_GPIOG); rcc_periph_clock_enable (RCC_USART1); - rcc_periph_clock_enable (RCC_USART3); + rcc_periph_clock_enable (RCC_USART2); rcc_periph_clock_enable (RCC_ETHMAC); rcc_periph_clock_enable (RCC_ETHMACTX); rcc_periph_clock_enable (RCC_ETHMACRX); rcc_periph_clock_enable (RCC_ETHMACPTP); - - - nvic_set_priority (NVIC_EXTI2_IRQ, 0x0); - nvic_set_priority (NVIC_EXTI0_IRQ, 0x10); - nvic_set_priority (NVIC_EXTI15_10_IRQ, 0x20); + nvic_set_priority (NVIC_EXTI9_5_IRQ, 0x00); + nvic_set_priority (NVIC_EXTI3_IRQ, 0x10); + nvic_set_priority (NVIC_EXTI4_IRQ, 0x20); nvic_set_priority (NVIC_USART1_IRQ, 0x30); - nvic_set_priority (NVIC_USART3_IRQ, 0x30); + nvic_set_priority (NVIC_USART2_IRQ, 0x30); nvic_set_priority (NVIC_ETH_IRQ, 0x40); nvic_set_priority (NVIC_SYSTICK_IRQ, 0x50); + + // nvic_enable_irq (NVIC_EXTI15_10_IRQ); } @@ -95,6 +230,8 @@ system_init (void) printf ("STETH\r\n"); steth_init(); + max7219_init (1); + gps_init(); ntp_init(); @@ -123,9 +260,6 @@ main (void) - - - while (1) { #if 0 { @@ -147,6 +281,8 @@ main (void) cmd_dispatch(); dispatch_lwip(); + max7219_dispatch(); + } return 0; |