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From 93bb6d731e96dc373b88a910ca9db66c560c8f4e Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Fri, 24 May 2013 21:28:08 +0200
Subject: [PATCH 74/79] USB: MIPS: ralink: fix usb issue on mt7620

USB fails when frequency scaling is enabled. Increase the idle cpu speed when
scaled.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/include/asm/mach-ralink/mt7620.h |    1 +
 arch/mips/ralink/mt7620.c                  |    8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
index 9809972..d469c69 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -20,6 +20,7 @@
 #define SYSC_REG_CHIP_REV		0x0c
 #define SYSC_REG_SYSTEM_CONFIG0		0x10
 #define SYSC_REG_SYSTEM_CONFIG1		0x14
+#define SYSC_REG_CPU_SYS_CLKCFG		0x3c
 #define SYSC_REG_CPLL_CONFIG0		0x54
 #define SYSC_REG_CPLL_CONFIG1		0x58
 
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 4956d96..d76eb85 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -186,6 +186,14 @@ void __init ralink_clk_init(void)
 	ralink_clk_add("10000500.uart", 40000000);
 	ralink_clk_add("10000b00.spi", 40000000);
 	ralink_clk_add("10000c00.uartlite", 40000000);
+
+#ifdef CONFIG_USB
+	/*
+	 * When the CPU goes into sleep mode, the BUS clock will be too low for
+	 * USB to function properly
+	 */
+	rt_sysc_m32(0x1f1f, 0x303, SYSC_REG_CPU_SYS_CLKCFG);
+#endif
 }
 
 void __init ralink_of_remap(void)
-- 
1.7.10.4