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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621_xiaomi_nand_128m.dtsi"
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_e000>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <ðphy0>;
nvmem-cells = <&macaddr_factory_e006>;
nvmem-cell-names = "mac-address";
};
&mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&switch0 {
ports {
port@2 {
status = "okay";
label = "lan1";
};
port@3 {
status = "okay";
label = "lan2";
};
port@4 {
status = "okay";
label = "lan3";
};
};
};
&state_default {
gpio {
groups = "uart2", "uart3", "wdt";
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_e000: macaddr@e000 {
reg = <0xe000 0x6>;
};
macaddr_factory_e006: macaddr@e006 {
reg = <0xe006 0x6>;
};
};
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