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#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "ralink,mt7620a-evb", "ralink,mt7620a-soc";
model = "Ralink MT7620a + MT7610e evaluation board";
keys {
compatible = "gpio-keys";
s2 {
label = "S2";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
s3 {
label = "S3";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c", "uartf";
function = "gpio";
};
};
ðernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
mediatek,portmap = "llllw";
port@4 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy4>;
};
port@5 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
phy5: ethernet-phy@5 {
reg = <5>;
phy-mode = "rgmii";
};
};
};
&gsw {
mediatek,port4 = "gmac";
};
&sdhci {
status = "okay";
};
&pcie {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
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