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diff -urN a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi 2020-03-02 17:16:13.700464470 +0800
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi 2020-03-02 17:15:55.276885406 +0800
@@ -554,6 +554,19 @@
status = "disabled";
};
+ snfi: spi@1100d000 {
+ compatible = "mediatek,mt7622-snfi";
+ reg = <0 0x1100d000 0 0x1000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>;
+ clock-names = "nfi_clk", "spi_clk";
+ ecc-engine = <&bch>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
nor_flash: spi@11014000 {
compatible = "mediatek,mt7622-nor",
"mediatek,mt8173-nor";
diff -urN a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-03-02 17:16:25.492193459 +0800
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-03-02 17:16:35.243968416 +0800
@@ -108,7 +108,7 @@
};
&bch {
- status = "disabled";
+ status = "okay";
};
&btif {
@@ -541,6 +541,62 @@
status = "disable";
};
+&snfi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "Preloader";
+ reg = <0x00000 0x0080000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "ATF";
+ reg = <0x80000 0x0040000>;
+ };
+
+ partition@c0000 {
+ label = "Bootloader";
+ reg = <0xc0000 0x0080000>;
+ };
+
+ partition@140000 {
+ label = "Config";
+ reg = <0x140000 0x0080000>;
+ };
+
+ partition@1c0000 {
+ label = "Factory";
+ reg = <0x1c0000 0x0040000>;
+ };
+
+ partition@200000 {
+ label = "firmware";
+ reg = <0x200000 0x2000000>;
+ };
+
+ partition@2200000 {
+ label = "User_data";
+ reg = <0x2200000 0x4000000>;
+ };
+ };
+ };
+};
+
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
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