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From a9f1d7994a9f8a38fdace19454ef031244e24e5e Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@nxp.com>
Date: Thu, 9 Nov 2017 16:58:40 +0800
Subject: [PATCH] MLK-16735 usb: host: add XHCI_CDNS_HOST flag
The NXP Cadence XHCI host has the same issue with Intel's,
it is triggered by reboot test, the test case is described
at this jira ticket.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 5e353132931b9dc6e05f6bea1281ae35dd6a59d8)
---
drivers/usb/host/xhci.c | 2 +-
drivers/usb/host/xhci.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -195,7 +195,7 @@ int xhci_reset(struct xhci_hcd *xhci, u6
* Without this delay, the subsequent HC register access,
* may result in a system hang very rarely.
*/
- if (xhci->quirks & XHCI_INTEL_HOST)
+ if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_CDNS_HOST))
udelay(1000);
ret = xhci_handshake(&xhci->op_regs->command, CMD_RESET, 0, timeout_us);
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1880,6 +1880,7 @@ struct xhci_hcd {
#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
+#define XHCI_CDNS_HOST BIT_ULL(36)
#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
#define XHCI_DISABLE_SPARSE BIT_ULL(38)
#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
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