aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/cns3xxx/patches-3.14/010-arm_introduce-dma-fiq-irq-broadcast.patch
blob: a7cf49bed26ec72aa6dd3e99f77d23cbdded7353 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -156,11 +156,19 @@ extern inline void nop_dma_unmap_area(co
 #define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)
 #define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)
 #define __cpuc_coherent_user_range	__glue(_CACHE,_coherent_user_range)
+#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
 #define __cpuc_flush_dcache_area	__glue(_CACHE,_flush_kern_dcache_area)
 
 #define dmac_map_area			__glue(_CACHE,_dma_map_area)
 #define dmac_unmap_area			__glue(_CACHE,_dma_unmap_area)
 #define dmac_flush_range		__glue(_CACHE,_dma_flush_range)
+#else
+#define __cpuc_flush_dcache_area	__glue(fiq,_flush_kern_dcache_area)
+
+#define dmac_map_area			__glue(fiq,_dma_map_area)
+#define dmac_unmap_area			__glue(fiq,_dma_unmap_area)
+#define dmac_flush_range		__glue(fiq,_dma_flush_range)
+#endif /* CONFIG_DMA_CACHE_FIQ_BROADCAST */
 #endif
 
 #endif
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -844,6 +844,17 @@ config DMA_CACHE_RWFO
 	  in hardware, other workarounds are needed (e.g. cache
 	  maintenance broadcasting in software via FIQ).
 
+config DMA_CACHE_FIQ_BROADCAST
+	bool "Enable fiq broadcast DMA cache maintenance"
+	depends on CPU_V6K && SMP
+	select FIQ
+	help
+	  The Snoop Control Unit on ARM11MPCore does not detect the
+	  cache maintenance operations and the dma_{map,unmap}_area()
+	  functions may leave stale cache entries on other CPUs. By
+	  enabling this option, fiq broadcast in the ARMv6
+	  DMA cache maintenance functions is performed.
+
 config OUTER_CACHE
 	bool
 
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -281,6 +281,7 @@ void __sync_icache_dcache(pte_t pteval)
 void flush_dcache_page(struct page *page)
 {
 	struct address_space *mapping;
+	bool skip_broadcast = true;
 
 	/*
 	 * The zero page is never written to, so never has any dirty
@@ -291,7 +292,10 @@ void flush_dcache_page(struct page *page
 
 	mapping = page_mapping(page);
 
-	if (!cache_ops_need_broadcast() &&
+#ifndef CONFIG_DMA_CACHE_FIQ_BROADCAST
+	skip_broadcast = !cache_ops_need_broadcast();
+#endif
+	if (skip_broadcast &&
 	    mapping && !page_mapped(page))
 		clear_bit(PG_dcache_clean, &page->flags);
 	else {