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From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Date: Sun, 18 Jun 2023 19:59:25 +0200
Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.

Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -614,6 +614,20 @@ void bmips_cpu_setup(void)
 		__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
 		break;
 
+	case CPU_BMIPS4350:
+		/* Enable data RAC */
+		if (!(read_c0_brcm_cmt_local() & (1 << 31))) {
+			cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+			__raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG);
+			__raw_readl(cbr + BMIPS_RAC_CONFIG);
+		} else {
+			cbr = (void __iomem *)0xff400000;
+			cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+			__raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1);
+			__raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+		}
+		break;
+
 	case CPU_BMIPS4380:
 		/* CBG workaround for early BMIPS4380 CPUs */
 		switch (read_c0_prid()) {