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From 9a9f4303c95f18cc062569c9c5d5240d06ddd69b Mon Sep 17 00:00:00 2001
From: Dom Cobley <popcornmix@gmail.com>
Date: Thu, 7 May 2020 18:16:08 +0100
Subject: [PATCH] vc4_hdmi_regs: Make interrupt mask variant specific
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++++++++++----
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
drivers/gpu/drm/vc4/vc4_regs.h | 9 +++++++++
3 files changed, 22 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1286,7 +1286,7 @@ static irqreturn_t vc4_cec_irq_handler(i
u32 stat = HDMI_READ(HDMI_CEC_CPU_STATUS);
u32 cntrl1, cntrl5;
- if (!(stat & VC4_HDMI_CPU_CEC))
+ if (!(stat & vc4_hdmi->variant->cec_mask))
return IRQ_NONE;
vc4_hdmi->cec_rx_msg.len = 0;
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
@@ -1302,7 +1302,7 @@ static irqreturn_t vc4_cec_irq_handler(i
cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
}
HDMI_WRITE(HDMI_CEC_CNTRL_1, cntrl1);
- HDMI_WRITE(HDMI_CEC_CPU_CLEAR, VC4_HDMI_CPU_CEC);
+ HDMI_WRITE(HDMI_CEC_CPU_CLEAR, vc4_hdmi->variant->cec_mask);
return IRQ_WAKE_THREAD;
}
@@ -1341,9 +1341,9 @@ static int vc4_hdmi_cec_adap_enable(stru
((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
- HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
+ HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, vc4_hdmi->variant->cec_mask);
} else {
- HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
+ HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, vc4_hdmi->variant->cec_mask);
HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
}
@@ -1785,6 +1785,8 @@ static const struct vc4_hdmi_variant bcm
.get_hsm_clock = vc4_hdmi_get_hsm_clock,
.calc_hsm_clock = vc4_hdmi_calc_hsm_clock,
.channel_map = vc4_hdmi_channel_map,
+
+ .cec_mask = VC4_HDMI_CPU_CEC,
};
static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = {
@@ -1810,6 +1812,8 @@ static const struct vc4_hdmi_variant bcm
.get_hsm_clock = vc5_hdmi_get_hsm_clock,
.calc_hsm_clock = vc5_hdmi_calc_hsm_clock,
.channel_map = vc5_hdmi_channel_map,
+
+ .cec_mask = VC5_HDMI0_CPU_CEC_RX | VC5_HDMI0_CPU_CEC_TX,
};
static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
@@ -1835,6 +1839,8 @@ static const struct vc4_hdmi_variant bcm
.get_hsm_clock = vc5_hdmi_get_hsm_clock,
.calc_hsm_clock = vc5_hdmi_calc_hsm_clock,
.channel_map = vc5_hdmi_channel_map,
+
+ .cec_mask = VC5_HDMI1_CPU_CEC_RX | VC5_HDMI1_CPU_CEC_TX,
};
static const struct of_device_id vc4_hdmi_dt_match[] = {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -97,6 +97,9 @@ struct vc4_hdmi_variant {
/* Callback to get channel map */
u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
+
+ /* Bitmask for CEC events */
+ u32 cec_mask;
};
/* HDMI audio information */
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -668,6 +668,15 @@
# define VC4_HDMI_CPU_CEC BIT(6)
# define VC4_HDMI_CPU_HOTPLUG BIT(0)
+# define VC5_HDMI0_CPU_CEC_RX BIT(1)
+# define VC5_HDMI0_CPU_CEC_TX BIT(0)
+# define VC5_HDMI0_CPU_HOTPLUG_CONN BIT(4)
+# define VC5_HDMI0_CPU_HOTPLUG_REM BIT(5)
+# define VC5_HDMI1_CPU_CEC_RX BIT(7)
+# define VC5_HDMI1_CPU_CEC_TX BIT(6)
+# define VC5_HDMI1_CPU_HOTPLUG_CONN BIT(10)
+# define VC5_HDMI1_CPU_HOTPLUG_REM BIT(11)
+
/* Debug: Current receive value on the CEC pad. */
# define VC4_HD_CECRXD BIT(9)
/* Debug: Override CEC output to 0. */
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