aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts
blob: 2c8401d731d0a46a82357a88ab776b8993e3cafa (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "qca955x.dtsi"

/ {
	compatible = "openmesh,om5p-ac-v2", "qca,qca9558";
	model = "OpenMesh OM5P-AC V2";

	extosc: ref {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-output-names = "ref";
		clock-frequency = <40000000>;
	};

	leds {
		compatible = "gpio-leds";

		power {
			label = "om5pac:blue:power";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};

		wifi_green {
			label = "om5pac:green:wifi";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};

		wifi_yellow {
			label = "om5pac:yellow:wifi";
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};

		wifi_red {
			label = "om5pac:red:wifi";
			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-export {
		compatible = "gpio-export";
		#size-cells = <0>;

		gpio_pa_dcdc {
			gpio-export,name = "om5pac:pa_dcdc";
			gpio-export,output = <1>;
			gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
		};
		gpio_pa_high {
			gpio-export,name = "om5pac:pa_high";
			gpio-export,output = <1>;
			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pinmux {
	pinmux_pa_dcdc_pins {
		pinctrl-single,bits = <0x0 0xff00 0x0>;
	};

	pinmux_pa_high_pins {
		pinctrl-single,bits = <0x10 0xff 0x0>;
	};
};

&pcie0 {
	status = "okay";
};

&uart {
	status = "okay";
};

&pll {
	clocks = <&extosc>;
};

&spi {
	status = "okay";
	num-cs = <1>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x000000 0x040000>;
				read-only;
			};

			partition@1 {
				label = "u-boot-env";
				reg = <0x040000 0x010000>;
			};

			partition@2 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x850000 0x7a0000>;
			};

			partition@3 {
				label = "art";
				reg = <0xff0000 0x010000>;
				read-only;
			};
		};
	};
};

&mdio0 {
	status = "okay";

	phy4: ethernet-phy@4 {
		reg = <4>;
		phy-mode = "rgmii-id";
	};
};

&mdio1 {
	status = "okay";

	phy1: ethernet-phy@1 {
		reg = <1>;
		phy-mode = "sgmii";
	};
};

&eth0 {
	status = "okay";

	pll-data = <0x82000101 0x80000101 0x80001313>;

	phy-handle = <&phy4>;
	phy-mode = "rgmii";
};

&eth1 {
	status = "okay";

	pll-data = <0x03000101 0x80000101 0x80001313>;

	phy-handle = <&phy1>;
	phy-mode = "sgmii";
};