/dts-v1/;
/include/ "rt5350.dtsi"
/ {
compatible = "A5-V11", "ralink,rt5350-soc";
model = "A5-V11";
palmbus@10000000 {
spi@b00 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "pm25lq032";
reg = <0 0>;
linux,modalias = "m25p80", "pm25lq032";
spi-max-frequency = <10000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x3b0000>;
};
};
};
gpio1: gpio@660 {
status = "okay";
};
};
pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "jtag", "uartf", "led";
ralink,function = "gpio";
};
};
};
ethernet@10100000 {
mtd-mac-address = <&factory 0x4>;
};
esw@10110000 {
mediatek,portmap = <0x2f>;
};
wmac@10180000 {
ralink,mtd-eeprom = <&factory 0>;
};
ehci@101c0000 {
status = "okay";
};
ohci@101c1000 {
status = "okay";
};
gpio-leds {
compatible = "gpio-leds";
system {
label = "a5-v11:blue:system";
gpios = <&gpio0 20 1>;
};
power {
label = "a5-v11:red:power";
gpios = <&gpio0 17 1>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 0 1>;
linux,code = <0x198>;
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
usb {
gpio-export,name = "usb";
gpio-export,output = <1>;
gpios = <&gpio0 7 0>;
};
root_hub {
gpio-export,name = "root_hub";
gpio-export,output = <1>;
gpios = <&gpio0 12 0>;
};
};
};
efs/?id=a05dcb07241aa83a4416b56201e31b4af8518981'>refslogtreecommitdiffstats
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9556_avm_fritz-repeater.dtsi"
/ {
compatible = "avm,fritzdvbc", "qca,qca9556";
model = "AVM FRITZ!WLAN Repeater DVB-C";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
num-chipselects = <0>;
spi_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <2>;
spi-max-frequency = <10000000>;
gpio_latch_bit {
gpio-hog;
gpios = <16 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
/*
* GPIO pins 100 or greater in the vendor GPL dump are redirected
* to the shift register.
* So OEM source pin 100 becomes 0 on the SR and so forth.
*/
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&spi_gpio 6 GPIO_ACTIVE_LOW>;
};
wlan {
label = "green:wlan";
gpios = <&spi_gpio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
tv {
label = "green:tv";
gpios = <&spi_gpio 5 GPIO_ACTIVE_LOW>;
};
rssihigh {
label = "green:rssihigh";
gpios = <&spi_gpio 1 GPIO_ACTIVE_LOW>;
};
rssimediumhigh {
label = "green:rssimediumhigh";
gpios = <&spi_gpio 2 GPIO_ACTIVE_LOW>;
};
rssimedium {
label = "green:rssimedium";
gpios = <&spi_gpio 3 GPIO_ACTIVE_LOW>;
};
rssimediumlow {
label = "green:rssimediumlow";
gpios = <&spi_gpio 4 GPIO_ACTIVE_LOW>;
};
rssilow {
label = "green:rssilow";
gpios = <&spi_gpio 0 GPIO_ACTIVE_LOW>;
};
};
};
&pcie0 {
status = "okay";
};
&gpio {
reset-pcie-ep {
gpio-hog;
gpios = <109 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE EP reset";
};
reset-pcie-bus {
gpio-hog;
gpios = <110 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE Bus reset";
};
};
|