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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
model = "PowerCloud Systems CR5000";
compatible = "pcs,cr5000", "qca,ar9344";
aliases {
serial0 = &uart;
led-boot = &status;
led-failsafe = &status;
led-running = &status;
led-upgrade = &status;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins>;
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
status: power {
label = "pcs:amber:power";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
<&gpio 4 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "pcs:blue:wlan";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wps_white {
label = "pcs:white:wps";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
};
&ref {
clock-frequency = <25000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&spi {
num-cs = <1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x07a0000>;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&usb {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&art 0x5002>;
#gpio-cells = <2>;
gpio-controller;
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
qca,ar8327-initvals = <
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xca35ca35 /* LED_CTRL1 */
0x58 0xc935c935 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
ð0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
/* default for ar934x, except for 1000M */
pll-data = <0x06000000 0x00000101 0x00001616>;
mtd-mac-address = <&art 0x0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
aliases {
ag0 = ð1;
};
port@0 {
compatible = "swconfig,port";
reg = <0>;
swconfig,segment = "lan";
swconfig,portmap = <1 1>;
};
port@1 {
compatible = "swconfig,port";
reg = <1>;
swconfig,segment = "lan";
swconfig,portmap = <2 2>;
};
port@2 {
compatible = "swconfig,port";
reg = <2>;
swconfig,segment = "lan";
swconfig,portmap = <3 3>;
};
port@3 {
compatible = "swconfig,port";
reg = <3>;
swconfig,segment = "lan";
swconfig,portmap = <4 4>;
};
port@4 {
compatible = "swconfig,port";
reg = <4>;
swconfig,segment = "wan";
swconfig,portmap = <5 5>;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x1002>;
};
|
