aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ath79/dts/ar9331_dragino_ms14.dts
blob: 9fb674eb2fe85c31e23ca1a95d1074b5f79640cd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "ar9331.dtsi"

/ {
	model = "Dragino MS14 (Dragino 2)";
	compatible = "dragino,ms14", "qca,ar9331";

	aliases {
		serial0 = &uart;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x4000000>;
	};

	leds {
		compatible = "gpio-leds";

		wlan {
			label = "dragino2:red:wlan";
			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		lan {
			label = "dragino2:red:lan";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		wan {
			label = "dragino2:red:wan";
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		system {
			label = "dragino2:red:system";
			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	keys {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <100>;

		button@0 {
			label = "jumpstart";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
		};

		button@1 {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
		};
	};
};

&ref {
	clock-frequency = <25000000>;
};

&uart {
	status = "okay";
};

&gpio {
	status = "okay";
};

&usb {
	dr_mode = "host";
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&spi {
	num-chipselects = <1>;
	status = "okay";

	/* Winbond 25Q128BVFG SPI flash */
	spiflash: w25q128@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "winbond,w25q128", "jedec,spi-nor";
		spi-max-frequency = <104000000>;
		reg = <0>;
	};
};