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From a9e38566ebe755219db10fa155fa8f0f4efc20d9 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 14 Mar 2012 10:29:23 +0100
Subject: [PATCH 07/47] MIPS: ath79: make ath724x_pcibios_init visible for external code
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: René Bolldorf <xsecute@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3487/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++
arch/mips/pci/pci-ath724x.c | 3 ++-
2 files changed, 22 insertions(+), 1 deletions(-)
create mode 100644 arch/mips/include/asm/mach-ath79/pci.h
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/pci.h
@@ -0,0 +1,20 @@
+/*
+ * Atheros 724x PCI support
+ *
+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_PCI_H
+#define __ASM_MACH_ATH79_PCI_H
+
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
+int ath724x_pcibios_init(void);
+#else
+static inline int ath724x_pcibios_init(void) { return 0; }
+#endif
+
+#endif /* __ASM_MACH_ATH79_PCI_H */
--- a/arch/mips/pci/pci-ath724x.c
+++ b/arch/mips/pci/pci-ath724x.c
@@ -9,6 +9,7 @@
*/
#include <linux/pci.h>
+#include <asm/mach-ath79/pci.h>
#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
@@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci
.mem_resource = &ath724x_mem_resource,
};
-static int __init ath724x_pcibios_init(void)
+int __init ath724x_pcibios_init(void)
{
register_pci_controller(&ath724x_pci_controller);
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