aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/apm821xx/dts/apm82181.dtsi
blob: 45d4eac171c10cb8ff9a2a8ad50101582b07749b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
/*
 * Device Tree for Bluestone (APM821xx) board.
 *
 * Copyright (c) 2010, Applied Micro Circuits Corporation
 * Author: Tirumala R Marri <tmarri@apm.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#include <dt-bindings/dma/dw-dmac.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	dcr-parent = <&{/cpus/cpu@0}>;
	compatible = "apm,bluestone";

	aliases {
		ethernet0 = &EMAC0; /* needed for BSP u-boot */
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		CPU00: cpu@0 {
			device_type = "cpu";
			model = "PowerPC,apm82181";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by U-Boot */
			timebase-frequency = <0>; /* Filled in by U-Boot */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
			next-level-cache = <&L2C0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
	};

	UIC0: interrupt-controller0 {
		compatible = "apm,uic-apm82181", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "apm,uic-apm82181", "ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
			     <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "apm,uic-apm82181", "ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
			     <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC3: interrupt-controller3 {
		compatible = "apm,uic-apm82181","ibm,uic";
		interrupt-controller;
		cell-index = <3>;
		dcr-reg = <0x0f0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
			     <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	OCM1: ocm@400040000 {
		compatible = "apm,ocm-apm82181", "ibm,ocm";
		status = "okay";
		cell-index = <1>;
		/* configured in U-Boot */
		reg = <4 0x00040000 0x8000>; /* 32K */
	};

	SDR0: sdr {
		compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
		dcr-reg = <0x00c 0x002>;
	};

	L2C0: l2c {
		compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
		dcr-reg = <0x020 0x008
			   0x030 0x008>;
		cache-line-size = <32>;
		cache-size = <262144>;
		interrupt-parent = <&UIC1>;
		interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
	};

	CPM0: cpm {
		compatible = "ibm,cpm-apm821xx", "ibm,cpm";
		cell-index = <0>;
		dcr-reg = <0x160 0x003>;
		pm-cpu = <0x02000000>;
		pm-doze = <0x302570F0>;
		pm-nap = <0x302570F0>;
		pm-deepsleep = <0x302570F0>;
		pm-iic-device = <&IIC0>;
		pm-emac-device = <&EMAC0>;
		unused-units = <0x00000100>;
		idle-doze = <0x02000000>;
		standby = <0xfeff791d>;
	};

	plb {
		compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges; /* Filled in by U-Boot */
		clock-frequency = <0>; /* Filled in by U-Boot */

		SDRAM0: sdram {
			compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
			dcr-reg = <0x010 0x002>;
		};

		RTC: rtc {
			compatible = "ibm,rtc";
			dcr-reg = <0x240 0x009>;
			interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&UIC2>;

		};

		TRNG: trng@110000 {
			compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
			reg = <4 0x00110000 0x100>;
			interrupt-parent = <&UIC1>;
			interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		PKA: pka@114000 {
			compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
			reg = <4 0x00114000 0x4000>;
			interrupt-parent = <&UIC0>;
			interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
			status = "disabled";
		};

		CRYPTO: crypto@180000 {
			compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
			reg = <4 0x00180000 0x80400>;
			interrupt-parent = <&UIC0>;
			interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled"; /* hardware option */
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
			descriptor-memory = "ocm";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <1>;
			num-rx-chans = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-parent = <&UIC2>;
			interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
				     <0x07 IRQ_TYPE_LEVEL_HIGH>,
				     <0x03 IRQ_TYPE_LEVEL_HIGH>,
				     <0x04 IRQ_TYPE_LEVEL_HIGH>,
				     <0x05 IRQ_TYPE_LEVEL_HIGH>,
				     <0x08 IRQ_TYPE_EDGE_FALLING>,
				     <0x09 IRQ_TYPE_EDGE_FALLING>,
				     <0x0c IRQ_TYPE_EDGE_FALLING>,
				     <0x0d IRQ_TYPE_EDGE_FALLING>;
			interrupt-names = "txeob", "rxeob", "serr",
					  "txde", "rxde",
					  "tx0coal", "tx1coal",
					  "rx0coal", "rx1coal";
		};

		POB0: opb {
			compatible = "ibm,opb-460ex", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
			clock-frequency = <0>; /* Filled in by U-Boot */

			EBC0: ebc {
				compatible = "ibm,ebc-460ex", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				/* ranges property is supplied by U-Boot */
				ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
				interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "cfi-flash";
					bank-width = <1>;
					reg = <0x00000000 0x00000000 0x00100000>;
					#address-cells = <1>;
					#size-cells = <1>;
					status = "disabled";
				};

				ndfc@1,0 {
					compatible = "ibm,ndfc";
					reg = <00000003 00000000 00002000>;
					ccr = <0x00001000>;
					bank-settings = <0x80002222>;
					#address-cells = <1>;
					#size-cells = <1>;
					status = "disabled";

					nand {
						#address-cells = <1>;
						#size-cells = <1>;
					};
				};
			};

			UART0: serial@ef600300 {
				/*
				 * AMCC's BSP u-boot scans for the "ns16550"
				 * compatible, without it, u-boot wouldn't
				 * set the required "clock-frequency".
				 *
				 * The hardware documentation states:
				 * "Register compatibility with 16750 register set"
				 */
				compatible = "ns16750", "ns16550";
				reg = <0xef600300 0x00000008>;
				virtual-reg = <0xef600300>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				interrupt-parent = <&UIC1>;
				interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			UART1: serial@ef600400 {
				/* same "ns16750" as with UART0 */
				compatible = "ns16750", "ns16550";
				reg = <0xef600400 0x00000008>;
				virtual-reg = <0xef600400>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				interrupt-parent = <&UIC0>;
				interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-460ex", "ibm,iic";
				reg = <0xef600700 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			IIC1: i2c@ef600800 {
				compatible = "ibm,iic-460ex", "ibm,iic";
				reg = <0xef600800 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			GPIO0: gpio@ef600b00 {
				compatible = "ibm,ppc4xx-gpio";
				reg = <0xef600b00 0x00000048>;
				#gpio-cells = <2>;
				gpio-controller;
				status = "disabled";
			};

			EMAC0: ethernet@ef600c00 {
				device_type = "network";
				compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
				interrupt-parent = <&EMAC0>;
				interrupts = <0 1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
						<1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "status", "wake";

				reg = <0xef600c00 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <16384>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				tah-device = <&TAH0>;
				tah-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
				status = "disabled";
			};

			TAH0: emac-tah@ef601350 {
				compatible = "ibm,tah-460ex", "ibm,tah";
				reg = <0xef601350 0x00000030>;
			};

			RGMII0: emac-rgmii@ef601500 {
				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
				reg = <0xef601500 0x00000008>;
				has-mdio;
			};
		};

		USBOTG0: usbotg@bff80000 {
			compatible = "amcc,dwc-otg";
			reg = <4 0xbff80000 0x10000>;
			interrupt-parent = <&USBOTG0>;
			interrupts = <0 1 2>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
					<1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
					<2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "usb-otg", "high-power", "dma";
			dr_mode = "host";
			status = "disabled";
		};

		AHBDMA0: dma@bffd0800 {
			compatible = "snps,dma-spear1340";
			reg = <4 0xbffd0800 0x400>;
			interrupt-parent = <&UIC0>;
			interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <3>;

			dma-channels = <2>;
			dma-masters = <3>;
			block_size = <4095>;
			data-width = <4>, <4>, <4>;
			multi-block = <1>, <1>;

			chan_allocation_order = <1>;
			chan_priority = <1>;

			snps,dma-protection-control =
				<(DW_DMAC_HPROT1_PRIVILEGED_MODE |
				  DW_DMAC_HPROT2_BUFFERABLE)>;
			is_memcpy;
		};

		SATA0: sata@bffd1000 {
			compatible = "amcc,sata-460ex";
			reg = <4 0xbffd1000 0x800>;
			interrupt-parent = <&UIC0>;
			interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&AHBDMA0 0 0 1>;
			dma-names = "sata-dma";
			status = "disabled";
		};

		SATA1: sata@bffd1800 {
			compatible = "amcc,sata-460ex";
			reg = <4 0xbffd1800 0x800>;
			interrupt-parent = <&UIC0>;
			interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&AHBDMA0 1 0 2>;
			dma-names = "sata-dma";
			status = "disabled";
		};

		MSI: ppc4xx-msi@c10000000 {
			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
			reg = <0xc 0x10000000 0x100
			       0xc 0x10000000 0x100>;
			sdr-base = <0x36C>;
			msi-data = <0x00004440>;
			msi-mask = <0x0000ffe0>;
			interrupts =<0 1 2 3 4 5 6 7>;
			interrupt-parent = <&MSI>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			msi-available-ranges = <0x0 0x100>;
			interrupt-map =
				<0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
				<1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
				<2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
				<3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
				<4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
				<5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
				<6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
				<7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
			status = "disabled";
		};

		PCIE0: pciex@d00000000 {
			device_type = "pci"; /* see ppc4xx_pci_find_bridge */
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
			primary;
			port = <0x0>; /* port number */
			reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
			      <0x0000000c 0x08010000 0x00001000>; /* Registers */
			dcr-reg = <0x100 0x020>;
			sdr-base = <0x300>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
				 <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
				 <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x40 to 0x7f */
			bus-range = <0x40 0x7f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map =
				<0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
				<0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
				<0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
				<0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */
			status = "disabled";
		};
	};
};