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#!/usr/bin/env perl
#
# Script for generating redboot configs, based on brcmImage.pl
#
# Copyright (C) 2015 Álvaro Fernández Rojas <noltari@gmail.com>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
#

use strict;
use Getopt::Std;
use File::stat;

my $version = "0.1";
my %arg = (
	o => 'redboot.script',
	s => 0x1000,
	f => 0xbe430000,
	a => 0x80010000,
	l => 0x7c0000,
	t => 20,
);
my $prog = $0;
$prog =~ s/^.*\///;
getopts("r:k:o:s:f:a:l:t:vh", \%arg);

die "usage: $prog ~opts~

  -r <file>	: input rootfs file
  -k <file>	: input kernel file
  -o <file>	: output image file, default $arg{o}
  -s <size_kb>	: redboot script size, default ".sprintf('%d', parse_num($arg{s}))."
  -f <baseaddr>	: flash base, default ".sprintf('0x%x', parse_num($arg{f}))."
  -a <loadaddr>	: Kernel load address, default ".sprintf('0x%x', parse_num($arg{a}))."
  -l <linux_kb>	: linux partition size, default ".sprintf('0x%x', parse_num($arg{l}))."
  -t <timeout> 	: redboot script timeout, default ".sprintf('%d', parse_num($arg{t}))."
  -v		: be more verbose
  -h		: help, version $version

EXAMPLES:
    $prog -k kern -r rootfs
" if $arg{h} || !$arg{k} || !$arg{r};

sub parse_num
{
	my $num = @_[0];
	if (index(lc($num), lc("0x")) == 0) {
		return hex($num);
	} else {
		return $num + 0;
	}
}

sub gen_script
{
	my $kernel_off = parse_num($arg{s});
	my $kernel_addr = parse_num($arg{f});
	my $kernel_len = stat($arg{k})->size;

	my $rootfs_off = $kernel_off + $kernel_len;
	my $rootfs_addr = $kernel_addr + $kernel_len;
	my $rootfs_len = parse_num($arg{l}) - $kernel_len;
	my $rootfs_size = stat($arg{r})->size;

	my $load_addr = parse_num($arg{a});

	my $timeout = parse_num($arg{t});

	if ($arg{v}) {
		printf "kernel_off: 0x%x(%u)\n", $kernel_off, $kernel_off;
		printf "kernel_addr: 0x%x(%u)\n", $kernel_addr, $kernel_addr;
		printf "kernel_len: 0x%x(%u)\n", $kernel_len, $kernel_len;

		printf "rootfs_off: 0x%x(%u)\n", $rootfs_off, $rootfs_off;
		printf "rootfs_addr: 0x%x(%u)\n", $rootfs_addr, $rootfs_addr;
		printf "rootfs_len: 0x%x(%u)\n", $rootfs_len, $rootfs_len;
		printf "rootfs_size: 0x%x(%u)\n", $rootfs_size, $rootfs_size;
	}

	open(FO, ">$arg{o}");
	printf FO "fis init -f\n";
	printf FO "\n";
	printf FO "fconfig boot_script true\n";
	printf FO "fconfig boot_script_data\n";
	printf FO "fis load -b 0x%x -d kernel\n", $load_addr;
	printf FO "exec -c \"noinitrd\" 0x%x\n", $load_addr;
	printf FO "\n";
	printf FO "fconfig boot_script_timeout %d\n", $timeout;
	printf FO "\n";
	printf FO "fis create -o 0x%x -f 0x%x -l 0x%x kernel\n", $kernel_off, $kernel_addr, $kernel_len;
	printf FO "\n";
	printf FO "fis create -o 0x%x -s 0x%x -f 0x%x -l 0x%x rootfs\n", $rootfs_off, $rootfs_size, $rootfs_addr, $rootfs_len;
	printf FO "\n";
	printf FO "reset\n";
	close FO;
}

# MAIN
gen_script();
an class="nb">} \item {\tt fsm\_opt} \end{itemize} \item Re-code FSM states (unless called with {\tt -norecode}): \begin{itemize} \item {\tt fsm\_recode} \end{itemize} \item Print information about FSMs: \begin{itemize} \item {\tt fsm\_info} \end{itemize} \item Export FSMs in KISS2 file format (if called with {\tt -export}): \begin{itemize} \item {\tt fsm\_export} \end{itemize} \item Map FSMs to RTL cells (unless called with {\tt -nomap}): \begin{itemize} \item {\tt fsm\_map} \end{itemize} \end{itemize} The {\tt fsm\_detect} pass identifies FSM state registers and marks them using the \B{fsm\_encoding}{\tt = "auto"} attribute. The {\tt fsm\_extract} extracts all FSMs marked using the \B{fsm\_encoding} attribute (unless \B{fsm\_encoding} is set to {\tt "none"}) and replaces the corresponding RTL cells with a {\tt \$fsm} cell. All other {\tt fsm\_*} passes operate on these {\tt \$fsm} cells. The {\tt fsm\_map} call finally replaces the {\tt \$fsm} cells with RTL cells. Note that these optimizations operate on an RTL netlist. I.e.~the {\tt fsm} pass should be executed after the {\tt proc} pass has transformed all {\tt RTLIL::Process} objects to RTL cells. The algorithms used for FSM detection and extraction are influenced by a more general reported technique \cite{fsmextract}. \subsection{FSM Detection} The {\tt fsm\_detect} pass identifies FSM state registers. It sets the \B{fsm\_encoding}{\tt = "auto"} attribute on any (multi-bit) wire that matches the following description: \begin{itemize} \item Does not already have the \B{fsm\_encoding} attribute. \item Is not an output of the containing module. \item Is driven by single {\tt \$dff} or {\tt \$adff} cell. \item The \B{D}-Input of this {\tt \$dff} or {\tt \$adff} cell is driven by a multiplexer tree that only has constants or the old state value on its leaves. \item The state value is only used in the said multiplexer tree or by simple relational cells that compare the state value to a constant (usually {\tt \$eq} cells). \end{itemize} This heuristic has proven to work very well. It is possible to overwrite it by setting \B{fsm\_encoding}{\tt = "auto"} on registers that should be considered FSM state registers and setting \B{fsm\_encoding}{\tt = "none"} on registers that match the above criteria but should not be considered FSM state registers. \subsection{FSM Extraction} The {\tt fsm\_extract} pass operates on all state signals marked with the \B{fsm\_encoding} ({\tt != "none"}) attribute. For each state signal the following information is determined: \begin{itemize} \item The state registers \item The asynchronous reset state if the state registers use asynchronous reset \item All states and the control input signals used in the state transition functions \item The control output signals calculated from the state signals and control inputs \item A table of all state transitions and corresponding control inputs- and outputs \end{itemize} The state registers (and asynchronous reset state, if applicable) is simply determined by identifying the driver for the state signal. From there the {\tt \$mux}-tree driving the state register inputs is recursively traversed. All select inputs are control signals and the leaves of the {\tt \$mux}-tree are the states. The algorithm fails if a non-constant leaf that is not the state signal itself is found. The list of control outputs is initialized with the bits from the state signal. It is then extended by adding all values that are calculated by cells that compare the state signal with a constant value. In most cases this will cover all uses of the state register, thus rendering the state encoding arbitrary. If however a design uses e.g.~a single bit of the state value to drive a control output directly, this bit of the state signal will be transformed to a control output of the same value. Finally, a transition table for the FSM is generated. This is done by using the {\tt ConstEval} C++ helper class (defined in {\tt kernel/consteval.h}) that can be used to evaluate parts of the design. The {\tt ConstEval} class can be asked to calculate a given set of result signals using a set of signal-value assignments. It can also be passed a list of stop-signals that abort the {\tt ConstEval} algorithm if the value of a stop-signal is needed in order to calculate the result signals. The {\tt fsm\_extract} pass uses the {\tt ConstEval} class in the following way to create a transition table. For each state: \begin{enumerate} \item Create a {\tt ConstEval} object for the module containing the FSM \item Add all control inputs to the list of stop signals \item Set the state signal to the current state \item Try to evaluate the next state and control output \label{enum:fsm_extract_cealg_try} \item If step~\ref{enum:fsm_extract_cealg_try} was not successful: \begin{itemize} \item Recursively goto step~\ref{enum:fsm_extract_cealg_try} with the offending stop-signal set to 0. \item Recursively goto step~\ref{enum:fsm_extract_cealg_try} with the offending stop-signal set to 1. \end{itemize} \item If step~\ref{enum:fsm_extract_cealg_try} was successful: Emit transition \end{enumerate} Finally a {\tt \$fsm} cell is created with the generated transition table and added to the module. This new cell is connected to the control signals and the old drivers for the control outputs are disconnected. \subsection{FSM Optimization} The {\tt fsm\_opt} pass performs basic optimizations on {\tt \$fsm} cells (not including state recoding). The following optimizations are performed (in this order): \begin{itemize} \item Unused control outputs are removed from the {\tt \$fsm} cell. The attribute \B{unused\_bits} (that is usually set by the {\tt opt\_clean} pass) is used to determine which control outputs are unused. \item Control inputs that are connected to the same driver are merged. \item When a control input is driven by a control output, the control input is removed and the transition table altered to give the same performance without the external feedback path. \item Entries in the transition table that yield the same output and only differ in the value of a single control input bit are merged and the different bit is removed from the sensitivity list (turned into a don't-care bit). \item Constant inputs are removed and the transition table is alterered to give an unchanged behaviour. \item Unused inputs are removed. \end{itemize} \subsection{FSM Recoding} The {\tt fsm\_recode} pass assigns new bit pattern to the states. Usually this also implies a change in the width of the state signal. At the moment of this writing only one-hot encoding with all-zero for the reset state is supported. The {\tt fsm\_recode} pass can also write a text file with the changes performed by it that can be used when verifying designs synthesized by Yosys using Synopsys Formality \citeweblink{Formality}. \section{Logic Optimization} Yosys can perform multi-level combinational logic optimization on gate-level netlists using the external program ABC \citeweblink{ABC}. The {\tt abc} pass extracts the combinational gate-level parts of the design, passes it through ABC, and re-integrates the results. The {\tt abc} pass can also be used to perform other operations using ABC, such as technology mapping (see Sec.~\ref{sec:techmap_extern} for details).