aboutsummaryrefslogtreecommitdiffstats
path: root/package/kernel/mwlwifi/patches/200-fix_excessive_delays.patch
blob: 43523edee098622d1fe757cef97a8e1194b205b1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
--- a/fwcmd.c
+++ b/fwcmd.c
@@ -132,7 +132,7 @@ static int mwl_fwcmd_wait_complete(struc
 			int_code = le16_to_cpu(*((__le16 *)&priv->pcmd_buf[2]));
 		else
 			int_code = le16_to_cpu(*((__le16 *)&priv->pcmd_buf[0]));
-		mdelay(1);
+		usleep_range(1000, 2000);
 	} while ((int_code != cmd) && (--curr_iteration));
 
 	if (curr_iteration == 0) {
@@ -142,7 +142,7 @@ static int mwl_fwcmd_wait_complete(struc
 		return -EIO;
 	}
 
-	mdelay(3);
+	usleep_range(3000, 5000);
 
 	return 0;
 }
--- a/fwdl.c
+++ b/fwdl.c
@@ -74,7 +74,7 @@ int mwl_fwdl_download_firmware(struct ie
 	/* FW before jumping to boot rom, it will enable PCIe transaction retry,
 	 * wait for boot code to stop it.
 	 */
-	mdelay(FW_CHECK_MSECS);
+	usleep_range(FW_CHECK_MSECS * 1000, FW_CHECK_MSECS * 2000);
 
 	writel(MACREG_A2HRIC_BIT_MASK,
 	       priv->iobase1 + MACREG_REG_A2H_INTERRUPT_CLEAR_SEL);
@@ -95,7 +95,7 @@ int mwl_fwdl_download_firmware(struct ie
 
 	/* make sure SCRATCH2 C40 is clear, in case we are too quick */
 	while (readl(priv->iobase1 + 0xc40) == 0)
-		;
+		cond_resched();
 
 	while (size_fw_downloaded < fw->size) {
 		len = readl(priv->iobase1 + 0xc40);
@@ -125,6 +125,7 @@ int mwl_fwdl_download_firmware(struct ie
 			int_code = readl(priv->iobase1 + 0xc1c);
 			if (int_code != 0)
 				break;
+			cond_resched();
 			curr_iteration--;
 		} while (curr_iteration);
 
@@ -133,6 +134,7 @@ int mwl_fwdl_download_firmware(struct ie
 			if ((int_code & MACREG_H2ARIC_BIT_DOOR_BELL) !=
 			    MACREG_H2ARIC_BIT_DOOR_BELL)
 				break;
+			cond_resched();
 			curr_iteration--;
 		} while (curr_iteration);
 
@@ -167,12 +169,14 @@ int mwl_fwdl_download_firmware(struct ie
 	do {
 		curr_iteration--;
 		if (priv->mfg_mode && priv->chip_type == MWL8897) {
-			mdelay(FW_CHECK_MSECS);
+			usleep_range(FW_CHECK_MSECS * 1000,
+				     FW_CHECK_MSECS * 2000);
 			int_code = readl(priv->iobase1 + 0xc44);
 		} else {
 			writel(HOSTCMD_SOFTAP_MODE,
 			       priv->iobase1 + MACREG_REG_GEN_PTR);
-			mdelay(FW_CHECK_MSECS);
+			usleep_range(FW_CHECK_MSECS * 1000,
+				     FW_CHECK_MSECS * 2000);
 			int_code = readl(priv->iobase1 + MACREG_REG_INT_CODE);
 		}
 		if (!(curr_iteration % 0xff) && (int_code != 0))