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From 47b386259625061b376f538055a4f3fbd0ab7fef Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 3 Mar 2021 10:48:53 +0800
Subject: [PATCH 17/21] board: mt7629: add support for booting from SPI-NAND
Add support for mt7629 to boot from SPI-NAND.
Add a new defconfig for mt7629+spi-nand configuration.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
arch/arm/dts/mt7629-rfb-u-boot.dtsi | 8 ++
arch/arm/dts/mt7629-rfb.dts | 10 +++
arch/arm/dts/mt7629.dtsi | 16 ++++
board/mediatek/mt7629/Kconfig | 35 ++++++++-
configs/mt7629_nand_rfb_defconfig | 111 ++++++++++++++++++++++++++++
include/configs/mt7629.h | 7 ++
6 files changed, 186 insertions(+), 1 deletion(-)
create mode 100644 configs/mt7629_nand_rfb_defconfig
--- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi
+++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi
@@ -40,3 +40,11 @@
&snfi {
u-boot,dm-pre-reloc;
};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&snand {
+ u-boot,dm-pre-reloc;
+};
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -47,9 +47,12 @@
};
snfi_pins: snfi-pins {
+ u-boot,dm-pre-reloc;
+
mux {
function = "flash";
groups = "snfi";
+ u-boot,dm-pre-reloc;
};
};
@@ -102,6 +105,13 @@
};
};
+&snand {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snfi_pins>;
+ status = "okay";
+ quad-spi;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -229,6 +229,22 @@
#size-cells = <0>;
};
+ snand: snand@1100d000 {
+ compatible = "mediatek,mt7629-snand";
+ reg = <0x1100d000 0x1000>,
+ <0x1100e000 0x1000>;
+ reg-names = "nfi", "ecc";
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>,
+ <&pericfg CLK_PERI_NFIECC_PD>;
+ clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>,
+ <&topckgen CLK_TOP_NFI_INFRA_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>,
+ <&topckgen CLK_TOP_UNIVPLL2_D8>;
+ status = "disabled";
+ };
+
snor: snor@11014000 {
compatible = "mediatek,mtk-snor";
reg = <0x11014000 0x1000>;
--- a/board/mediatek/mt7629/Kconfig
+++ b/board/mediatek/mt7629/Kconfig
@@ -12,6 +12,39 @@ config MTK_SPL_PAD_SIZE
config MTK_BROM_HEADER_INFO
string
- default "media=nor"
+ default "media=nor" if BOOT_FROM_SNOR
+ default "media=snand;nandinfo=2k+64" if BOOT_FROM_SNAND_2K_64
+ default "media=snand;nandinfo=2k+128" if BOOT_FROM_SNAND_2K_128
+ default "media=snand;nandinfo=4k+128" if BOOT_FROM_SNAND_4K_128
+ default "media=snand;nandinfo=4k+256" if BOOT_FROM_SNAND_4K_256
+
+choice
+ prompt "Boot device"
+ default BOOT_FROM_SNOR
+
+config BOOT_FROM_SNOR
+ bool "SPI-NOR"
+
+config BOOT_FROM_SNAND_2K_64
+ bool "SPI-NAND (2K+64)"
+ select MT7629_BOOT_FROM_SNAND
+
+config BOOT_FROM_SNAND_2K_128
+ bool "SPI-NAND (2K+128)"
+ select MT7629_BOOT_FROM_SNAND
+
+config BOOT_FROM_SNAND_4K_128
+ bool "SPI-NAND (4K+128)"
+ select MT7629_BOOT_FROM_SNAND
+
+config BOOT_FROM_SNAND_4K_256
+ bool "SPI-NAND (4K+256)"
+ select MT7629_BOOT_FROM_SNAND
+
+endchoice
+
+config MT7629_BOOT_FROM_SNAND
+ bool
+ default n
endif
--- /dev/null
+++ b/configs/mt7629_nand_rfb_defconfig
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_SYS_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_SPL_TEXT_BASE=0x201000
+CONFIG_TARGET_MT7629=y
+CONFIG_BOOT_FROM_SNAND_2K_64=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x40800000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_BUILD_TARGET="u-boot-mtk.bin"
+CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
+CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="mt7629-rfb"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_BIND=y
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_LOG=y
+CONFIG_EFI_PARTITION=y
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-parents"
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MTD=y
+CONFIG_ENV_MTD_NAME="spi-nand0"
+CONFIG_ENV_SIZE_REDUND=0x40000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_BLK=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTK_SPI_NAND=y
+CONFIG_MTK_SPI_NAND_MTD=y
+CONFIG_SPL_MTK_SPI_NAND=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_PINCONF=y
+CONFIG_PINCTRL_MT7629=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_MEM=y
+CONFIG_MTK_SNFI_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MTK=y
+CONFIG_USB_STORAGE=y
+CONFIG_WDT_MTK=y
+CONFIG_FAT_WRITE=y
+CONFIG_LZMA=y
+CONFIG_SPL_LZMA=y
+# CONFIG_EFI_LOADER is not set
--- a/include/configs/mt7629.h
+++ b/include/configs/mt7629.h
@@ -30,12 +30,19 @@
/* Defines for SPL */
#define CONFIG_SPL_STACK 0x106000
+#ifdef CONFIG_MT7629_BOOT_FROM_SNAND
+#define CONFIG_SPL_MAX_SIZE SZ_128K
+#define CONFIG_SPL_MAX_FOOTPRINT SZ_128K
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
+#else
#define CONFIG_SPL_MAX_SIZE SZ_64K
#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K
#define CONFIG_SPL_PAD_TO 0x10000
#define CONFIG_SPI_ADDR 0x30000000
#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
+#endif
/* SPL -> Uboot */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
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