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* mediatek: switch to Linux version 6.1Daniel Golle2024-02-1516-6844/+0
| | | | | | Drop support for Linux 5.15 and switch to Linux 6.1. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: improve pinctrl driversDaniel Golle2023-08-282-31/+32
| | | | | | | Set correct pull-type data and add additional uart groups for MT7981. Assign functions to configure pin bias for MT7986. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: mt7988: mark RTC clock as criticalDaniel Golle2023-08-131-1/+8
| | | | | | | | A dependency of the MT7988 MMC host controller on the SoC's RTC clock being running has been discovered. Mark RTC clock as critical to fix MMC host on MT7988. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: restore non-const type in pinctrl-mt7988 driverDaniel Golle2023-08-031-17/+17
| | | | | | | | When building with Linux 5.15 the 'const' type results in warnings. Restore the original non-const type in those cases. Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDKDaniel Golle2023-08-031-115/+300
| | | | | | Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: use backported Ethernet PHY driver also for 5.15Daniel Golle2023-07-081-1263/+0
| | | | | | | Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the driver in files-5.15. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: sync MT7986 device trees with upstreamDaniel Golle2023-06-051-1/+1
| | | | | | | | Sync device tree files for MT7986 boards with what landed in upstream Linux tree to easy maintainance and also allow for a smooth update to Linux 6.1. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add driver for built-in 2.5G Ethernet PHYDaniel Golle2023-05-231-0/+262
| | | | | | | | Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC. To function the PHY also needs firmware files which have not yet been published via linux-firmware. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: update pending SoC Ethernet PHY driverDaniel Golle2023-05-231-0/+1263
| | | | | | | Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be found in the MT7981 and MT7988 SoCs. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add mt7988 pinctrl driver supportSam Shih2023-05-231-0/+1281
| | | | | | | This adds provisional pinctrl driver support for the MediaTek MT7988 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add mt7988 clock drivers supportSam Shih2023-05-234-0/+1333
| | | | | | | This adds clock drivers for the MediaTek MT7988 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: sync pinctrl-mt7981 and pinctrl-mt7986 driversDaniel Golle2023-04-132-25/+150
| | | | | | | Now that new pinconf features have been backported sync pinctrl-mt7981 and pinctrl-m7986 with bleeding-edge upstream versions. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: backport pinctrl driver for MT7981 SoCDaniel Golle2023-03-271-0/+993
| | | | | | | Backport the pinctrl driver for the MT7981 SoC. The driver has also been submitted upstream and is part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: backport clk driver for MT7981 SoCDaniel Golle2023-03-274-0/+926
| | | | | | | Backport driver for common clocks in MT7981 SoC. The driver has also been submitted upstream and became part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: consolidate adc '32k' clockDaniel Golle2022-10-201-1/+1
| | | | | | | | | | Add dependency to '32k' ADC clock so it is always enabled for thermal and raw access to ADC values. This allows to remove the patch for the ADC driver and reduce the patch adding thermal support for MT7986 to only add the new efuse layout and temperature decoding for V3. Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add mt7986 soc support to the targetSam Shih2022-08-285-0/+1731
It will be supported by the new filogic subtarget Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Daniel Golle <daniel@makrotopia.org>