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Refreshed all patches.
Remove upstreamed:
- 840-media-i2c-tda1997x-select-V4L2_FWNODE.patch
- 079-v4.20-ARM-dts-qcom-ipq4019-fix-PCI-range.patch
- 083-ARM-dts-qcom-ipq4019-enlarge-PCIe-BAR-range.patch
- 084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch
Fixes:
- CVE-2019-15030
Compile-tested on: cns3xxx
Runtime-tested on: cns3xxx
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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This should align opp table with what it was before converting to OPP v2.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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From: Niklas Cassel <niklas.cassel@linaro.org>
|The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level
|triggered interrupt.
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|The msi_ctrl_int will be high for as long as any MSI status bit is set,
|thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the
|IRQ handler to keep getting called, as long as any MSI status bit is set.
|[...]
|Not having the correct IRQ type defined will cause us to lose interrupts,
|which in turn causes timeouts in the PCIe endpoint drivers.
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|Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
|Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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