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path: root/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
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* ar71xx: move arch specific files to files-2.6.39Gabor Juhos2012-01-221-1076/+0
* ar71xx: allow to attach the internal switch for AR934xGabor Juhos2011-12-151-0/+2
* ar71xx: introduce ar71xx_switch_dataGabor Juhos2011-12-151-2/+4
* ar71xx: allow to pass negative offset values for ar71xx_init_macGabor Juhos2011-12-051-2/+2
* ar71xx: set GE0 phy_mask for AR933xGabor Juhos2011-11-201-0/+2
* ar71xx: force hardwired interface parameters in ar71xx_add_device_ethGabor Juhos2011-11-141-1/+11
* ar71xx: use if-else instead of conditional operators in ar71xx_add_device_ethGabor Juhos2011-11-141-48/+76
* ar71xx: enable has_gbit flag on AR724{0,1}Gabor Juhos2011-11-131-0/+1
* ar71xx: remove mii_ctrl resources of the ethernet devicesGabor Juhos2011-11-131-10/+0
* ar71xx: set MII interface speed from the set_speed callbacksGabor Juhos2011-11-131-0/+34
* ar71xx: rename set_pll callback to set_speed in ag71xx_platform_dataGabor Juhos2011-11-131-27/+27
* ar71xx: configure MII interface type from ar71xx_setup_phy_if_modeGabor Juhos2011-11-131-6/+26
* ar71xx: implement SoC specific phy interface setupGabor Juhos2011-11-121-17/+85
* ar71xx: move phy interface setup into a separate functionGabor Juhos2011-11-121-24/+39
* ar71xx: add AR934X specific MDIO registration codeGabor Juhos2011-11-121-1/+38
* ar71xx: add a secondary mdio busGabor Juhos2011-11-121-15/+56
* ar71xx: rename ar71xx_mdio_* structures to ar71xx_mdio0_*Gabor Juhos2011-11-121-16/+16
* ar71xx: add an id argument to ar71xx_add_device_mdioGabor Juhos2011-11-121-1/+6
* ar71xx: allow to register ethernet interfaces for AR934XGabor Juhos2011-11-121-0/+54
* ar71xx: fix ethernet PLL setting on ar7242Felix Fietkau2011-08-291-3/+5
* ar71xx: add some code to detect DMA stuck conditions on ar7240Felix Fietkau2011-08-131-0/+2
* ar71xx: reset the phy in the ethernet init on ar724xFelix Fietkau2011-07-201-2/+6
* ar71xx: fix uart clock frequency for AR933XGabor Juhos2011-06-191-1/+1
* ar71xx: register UART for the AR933X SoCsGabor Juhos2011-05-311-3/+33
* ar71xx: add ethernet initialization for the AR933X SoCsGabor Juhos2011-05-311-0/+59
* ar71xx: don't register 8250 UART on the AR933x SoCsGabor Juhos2011-05-311-1/+6
* ar71xx: fix MDIO access on ar7242 (based on a patch by Jess Zhu)Felix Fietkau2011-04-281-25/+61
* ar71xx: rename ar934x_ref_freq to ar71xx_ref_freqGabor Juhos2011-04-091-1/+1
* ar71xx: add AR934x specific UART clock initializationGabor Juhos2011-04-071-2/+25
* ar71xx: use the MDIO interface of the 2nd MAC on the ar7241Gabor Juhos2010-09-271-0/+6
* ar71xx: change mac address initializationGabor Juhos2010-08-181-5/+23
* ar71xx: set default values for the fifo cfg registers on AR724xFelix Fietkau2010-07-201-0/+7
* ar71xx: reset the mdio bus on ar7241/ar7242Felix Fietkau2010-03-281-1/+4
* ar71xx: add support for ar7241 and ar7242Felix Fietkau2010-03-261-1/+12
* ar71xx: update mips multi-machine stuffGabor Juhos2010-01-011-0/+14
* ar71xx: move dsa switch device support into a separate fileGabor Juhos2009-12-261-35/+3
* ar71xx: move USB host device support into a separate fileGabor Juhos2009-12-261-148/+0
* ar71xx: move gpio-buttons support into a spearate fileGabor Juhos2009-12-261-43/+0
* ar71xx: move leds-gpio device support into a spearate fileGabor Juhos2009-12-261-39/+0
* ar71xx: ar913x_wmac device support into a separate fileGabor Juhos2009-12-181-41/+0
* ar71xx: merge DSA switch patchGabor Juhos2009-12-111-1/+6
* ar71xx: add support for external mii_busGabor Juhos2009-12-081-0/+3
* ar71xx: add usb support for ubnt rocket mFelix Fietkau2009-11-291-0/+33
* ar71xx: use __init for ar{71,91}xx_usb_setupGabor Juhos2009-11-161-2/+2
* ar71xx: use soc specific divider for mdio clockGabor Juhos2009-10-301-3/+5
* ar71xx: reset the ethernet device before registrationGabor Juhos2009-10-191-0/+7
* ar71xx: don't use mac_base2 in the ag71xx driverGabor Juhos2009-09-231-12/+2
* remove AR71XX_EARLY_SERIAL stuffGabor Juhos2009-08-251-2/+0
* add AR7240 specific fixes for the ag71xx driverGabor Juhos2009-07-071-0/+39
* add support for board specific PLL settingsGabor Juhos2009-05-281-4/+102
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