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* [scripts] cygwin also needs to be passed LIBS=-lncurses to link lxdialog succ...Florian Fainelli2009-04-101-2/+3
* menuconfig: don't generate inconsistencies when ~/.openwrt/defconfig specifie...Felix Fietkau2008-10-181-5/+1
* ignore mconf_checkFelix Fietkau2007-10-201-0/+1
* add possibility to set default .config valuesJohn Crispin2007-10-143-58/+88
* add initial version of a package feeds management scriptFelix Fietkau2007-09-231-18/+1
* color change to make menuconfig easier to read (patch from #1730)Felix Fietkau2007-07-111-5/+5
* remove a useless warningFelix Fietkau2007-06-121-3/+0
* Add gitignore filesFelix Fietkau2007-05-291-0/+5
* fix menuconfig 'deselect' statementFelix Fietkau2007-03-291-4/+7
* add 'deselect' property for menuconfigFelix Fietkau2007-03-239-442/+483
* disable the automatic config reset if 'Advanced configuration options' is sel...Felix Fietkau2007-03-044-104/+108
* force a config reset when the user changes the target platform in menuconfigFelix Fietkau2007-03-046-290/+317
* add openbsd compatibility patch (thanks, wbx)Felix Fietkau2006-12-102-2/+9
* *sigh* increase size of the static buffer allocated in menuconfig againFelix Fietkau2006-10-171-1/+1
* don't generate .tmpconfig.h and .kconfig.dFelix Fietkau2006-10-142-70/+1
* improve ncurses checkFelix Fietkau2006-10-131-1/+1
* fix lxdialog build targetFelix Fietkau2006-10-131-3/+2
* remove useless fileFelix Fietkau2006-10-131-4/+0
* fix lxdialog cc/ldflags check script for darwin/osxFelix Fietkau2006-09-271-15/+21
* disable gettext in menuconfigFelix Fietkau2006-09-271-4/+1
* Standardize shell script, closes #788Florian Fainelli2006-09-211-1/+1
* increase the size of a few static buffers in menuconfig - fixes display of me...Felix Fietkau2006-08-081-3/+4
* FreeBSD fix to generate the menuconfig properlyFlorian Fainelli2006-08-021-0/+9
* add 'reset to defaults' to menuconfigFelix Fietkau2006-06-253-0/+29
* add wildcard support to menuconfig (again)Mike Baker2006-05-122-44/+86
* menuconfig cleanupFelix Fietkau2006-04-201-8/+8
* modify the kconfig system for openwrtFelix Fietkau2006-04-209-37/+49
* add kconfig from linux 2.6 to scripts/configFelix Fietkau2006-04-2032-0/+13670
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-20 20:06:45 +0000
n> = 1; parameter [16383:0] INIT = 16384'hx; parameter CLKPOL2 = 1; parameter CLKPOL3 = 1; input CLK2; input CLK3; input [CFG_ABITS-1:0] A1ADDR; input [CFG_DBITS-1:0] A1DATA; input [CFG_ENABLE_A-1:0] A1EN; input [CFG_ABITS-1:0] B1ADDR; output [CFG_DBITS-1:0] B1DATA; input B1EN; wire [31-CFG_DBITS:0] open; generate if (CFG_DBITS == 1) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(1), .BIT_WIDTH_1(1), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(A1EN), .OCE(1'b0), .CEA(1'b1), .WREB(1'b0), .CEB(B1EN), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI({{(32-CFG_DBITS){1'b0}}, A1DATA}), .DO({open, B1DATA}), .ADA({A1ADDR, {(14-CFG_ABITS){1'b0}}}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else if (CFG_DBITS == 2) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(2), .BIT_WIDTH_1(2), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(A1EN), .OCE(1'b0), .CEA(1'b1), .WREB(1'b0), .CEB(B1EN), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI({{(32-CFG_DBITS){1'b0}}, A1DATA}), .DO({open, B1DATA}), .ADA({A1ADDR, {(14-CFG_ABITS){1'b0}}}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else if (CFG_DBITS <= 4) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(4), .BIT_WIDTH_1(4), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(A1EN), .OCE(1'b0), .WREB(1'b0), .CEB(B1EN), .CEA(1'b1), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI({{(32-CFG_DBITS){1'b0}}, A1DATA}), .DO({open, B1DATA}), .ADA({A1ADDR, {(14-CFG_ABITS){1'b0}}}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else if (CFG_DBITS <= 8) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(8), .BIT_WIDTH_1(8), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(A1EN), .OCE(1'b0), .CEA(1'b1), .WREB(1'b0), .CEB(B1EN), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI({{(32-CFG_DBITS){1'b0}}, A1DATA}), .DO({open, B1DATA}), .ADA({A1ADDR, {(14-CFG_ABITS){1'b0}}}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else if (CFG_DBITS <= 16) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(16), .BIT_WIDTH_1(16), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(|A1EN), .OCE(1'b0), .WREB(1'b0), .CEB(B1EN), .CEA(1'b1), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI({{(32-CFG_DBITS){1'b0}}, A1DATA}), .DO({open, B1DATA}), .ADA({A1ADDR, {(12-CFG_ABITS){1'b0}}, A1EN}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else if (CFG_DBITS <= 32) begin SDP #( `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(32), .BIT_WIDTH_1(32), .BLK_SEL(3'b000), .RESET_MODE("SYNC") ) _TECHMAP_REPLACE_ ( .CLKA(CLK2), .CLKB(CLK3), .WREA(|A1EN), .OCE(1'b0), .WREB(1'b0), .CEB(B1EN), .CEA(1'b1), .RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000), .DI(A1DATA), .DO(B1DATA), .ADA({A1ADDR, {(10-CFG_ABITS){1'b0}}, A1EN}), .ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}}) ); end else begin wire TECHMAP_FAIL = 1'b1; end endgenerate endmodule
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-20 20:06:45 +0000