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-rw-r--r--toolchain/gcc/patches/4.3.5/942-avr32_fix_32bit_div.patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/4.3.5/942-avr32_fix_32bit_div.patch b/toolchain/gcc/patches/4.3.5/942-avr32_fix_32bit_div.patch
new file mode 100644
index 0000000000..af66a6d500
--- /dev/null
+++ b/toolchain/gcc/patches/4.3.5/942-avr32_fix_32bit_div.patch
@@ -0,0 +1,34 @@
+--- a/gcc/config/avr32/lib1funcs.S
++++ b/gcc/config/avr32/lib1funcs.S
+@@ -2257,10 +2257,13 @@ __avr32_f32_div:
+
+ /* Unpack */
+ lsl r12,1
+- reteq 0 /* Return zero if op1 is zero */
+ lsl r11,1
+ breq 4f /* Check op2 for zero */
+-
++
++ tst r12, r12
++ moveq r9, 0
++ breq 12
++
+ /* Unpack op1*/
+ /* exp: r9 */
+ /* sf: r12 */
+@@ -2279,9 +2282,14 @@ __avr32_f32_div:
+ breq 13f /*If number is subnormal*/
+ cp r10, 0xff
+ brhs 3f /* Check op2 for NaN or Inf */
+-
+ lsl r11,7
+ sbr r11, 31 /*Implicit bit*/
++
++ cp.w r9, 0
++ subfeq r12, 0
++ reteq 0 /* op1 is zero and op2 is not zero */
++ /* or NaN so return zero */
++
+ 14:
+
+ /* For UC3, store with predecrement is faster than stm */