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Diffstat (limited to 'target/linux/omap/patches-3.13/903-wl12xx-use-frequency-instead-of-enumerations-for-pdata-clocks.patch')
-rw-r--r--target/linux/omap/patches-3.13/903-wl12xx-use-frequency-instead-of-enumerations-for-pdata-clocks.patch231
1 files changed, 231 insertions, 0 deletions
diff --git a/target/linux/omap/patches-3.13/903-wl12xx-use-frequency-instead-of-enumerations-for-pdata-clocks.patch b/target/linux/omap/patches-3.13/903-wl12xx-use-frequency-instead-of-enumerations-for-pdata-clocks.patch
new file mode 100644
index 0000000000..db646df022
--- /dev/null
+++ b/target/linux/omap/patches-3.13/903-wl12xx-use-frequency-instead-of-enumerations-for-pdata-clocks.patch
@@ -0,0 +1,231 @@
+Instead of defining an enumeration with the FW specific values for the
+different clock rates, use the actual frequency instead. Also add a
+boolean to specify whether the clock is XTAL or not.
+
+Change all board files to reflect this.
+
+Additionally, this reverts commit 26f45c (ARM: OMAP2+: Legacy support
+for wl12xx when booted with devicetree), since this is not be needed
+anymore, now that DT support for WiLink is implemented.
+
+Cc: Tony Lindgren <tony@atomide.com>
+Cc: Sekhar Nori <nsekhar@ti.com>
+Signed-off-by: Luciano Coelho <coelho@ti.com>
+Reviewed-by: Felipe Balbi <balbi@ti.com>
+
+---
+ arch/arm/mach-davinci/board-da850-evm.c | 3 +-
+ arch/arm/mach-omap2/board-omap3evm.c | 3 +-
+ arch/arm/mach-omap2/board-zoom-peripherals.c | 3 +-
+ arch/arm/mach-omap2/devices.c | 39 -------------------
+ drivers/net/wireless/ti/wl12xx/main.c | 58 +++++++++++++++++++++++++++-
+ drivers/net/wireless/ti/wl12xx/wl12xx.h | 28 ++++++++++++++
+ include/linux/wl12xx.h | 27 ++-----------
+ 7 files changed, 93 insertions(+), 68 deletions(-)
+
+--- a/drivers/net/wireless/ti/wl12xx/main.c
++++ b/drivers/net/wireless/ti/wl12xx/main.c
+@@ -1711,6 +1711,43 @@ static struct ieee80211_sta_ht_cap wl12x
+ },
+ };
+
++static const struct wl12xx_clock wl12xx_refclock_table[] = {
++ { 19200000, false, WL12XX_REFCLOCK_19 },
++ { 26000000, false, WL12XX_REFCLOCK_26 },
++ { 26000000, true, WL12XX_REFCLOCK_26_XTAL },
++ { 38400000, false, WL12XX_REFCLOCK_38 },
++ { 38400000, true, WL12XX_REFCLOCK_38_XTAL },
++ { 52000000, false, WL12XX_REFCLOCK_52 },
++ { 0, false, 0 }
++};
++
++static const struct wl12xx_clock wl12xx_tcxoclock_table[] = {
++ { 16368000, true, WL12XX_TCXOCLOCK_16_368 },
++ { 16800000, true, WL12XX_TCXOCLOCK_16_8 },
++ { 19200000, true, WL12XX_TCXOCLOCK_19_2 },
++ { 26000000, true, WL12XX_TCXOCLOCK_26 },
++ { 32736000, true, WL12XX_TCXOCLOCK_32_736 },
++ { 33600000, true, WL12XX_TCXOCLOCK_33_6 },
++ { 38400000, true, WL12XX_TCXOCLOCK_38_4 },
++ { 52000000, true, WL12XX_TCXOCLOCK_52 },
++ { 0, false, 0 }
++};
++
++static int wl12xx_get_clock_idx(const struct wl12xx_clock *table,
++ u32 freq, bool xtal)
++{
++ int i = 0;
++
++ while(table[i].freq != 0) {
++ if ((table[i].freq == freq) &&
++ (table[i].xtal == xtal))
++ return table[i].hw_idx;
++ i++;
++ };
++
++ return -EINVAL;
++}
++
+ static int wl12xx_setup(struct wl1271 *wl)
+ {
+ struct wl12xx_priv *priv = wl->priv;
+@@ -1732,7 +1769,16 @@ static int wl12xx_setup(struct wl1271 *w
+ wl12xx_conf_init(wl);
+
+ if (!fref_param) {
+- priv->ref_clock = pdata->board_ref_clock;
++ priv->ref_clock = wl12xx_get_clock_idx(wl12xx_refclock_table,
++ pdata->ref_clock_freq,
++ pdata->ref_clock_xtal);
++ if (priv->ref_clock < 0) {
++ wl1271_error("Invalid ref_clock frequency (%d Hz, %s)",
++ pdata->ref_clock_freq,
++ pdata->ref_clock_xtal ? "XTAL" : "not XTAL");
++
++ return priv->ref_clock;
++ }
+ } else {
+ if (!strcmp(fref_param, "19.2"))
+ priv->ref_clock = WL12XX_REFCLOCK_19;
+@@ -1751,7 +1797,15 @@ static int wl12xx_setup(struct wl1271 *w
+ }
+
+ if (!tcxo_param) {
+- priv->tcxo_clock = pdata->board_tcxo_clock;
++ priv->tcxo_clock = wl12xx_get_clock_idx(wl12xx_tcxoclock_table,
++ pdata->tcxo_clock_freq,
++ true);
++ if (priv->tcxo_clock < 0) {
++ wl1271_error("Invalid tcxo_clock frequency (%d Hz)",
++ pdata->tcxo_clock_freq);
++
++ return priv->tcxo_clock;
++ }
+ } else {
+ if (!strcmp(tcxo_param, "19.2"))
+ priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
+--- a/drivers/net/wireless/ti/wl12xx/wl12xx.h
++++ b/drivers/net/wireless/ti/wl12xx/wl12xx.h
+@@ -79,4 +79,32 @@ struct wl12xx_priv {
+ struct wl127x_rx_mem_pool_addr *rx_mem_addr;
+ };
+
++/* Reference clock values */
++enum {
++ WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
++ WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
++ WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
++ WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
++ WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
++ WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
++};
++
++/* TCXO clock values */
++enum {
++ WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
++ WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
++ WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
++ WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
++ WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
++ WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
++ WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
++ WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
++};
++
++struct wl12xx_clock {
++ u32 freq;
++ bool xtal;
++ u8 hw_idx;
++};
++
+ #endif /* __WL12XX_PRIV_H__ */
+--- a/include/linux/wl12xx.h
++++ b/include/linux/wl12xx.h
+@@ -26,28 +26,6 @@
+
+ #include <linux/err.h>
+
+-/* Reference clock values */
+-enum {
+- WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
+- WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
+- WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
+- WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
+- WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
+- WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
+-};
+-
+-/* TCXO clock values */
+-enum {
+- WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
+- WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
+- WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
+- WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
+- WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
+- WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
+- WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
+- WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
+-};
+-
+ struct wl1251_platform_data {
+ void (*set_power)(bool enable);
+ /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
+@@ -57,8 +35,9 @@ struct wl1251_platform_data {
+
+ struct wl12xx_platform_data {
+ int irq;
+- int board_ref_clock;
+- int board_tcxo_clock;
++ int ref_clock_freq; /* in Hertz */
++ bool ref_clock_xtal; /* specify whether the clock is XTAL or not */
++ int tcxo_clock_freq; /* in Hertz, tcxo is always XTAL */
+ };
+
+ #ifdef CONFIG_WILINK_PLATFORM_DATA
+--- a/arch/arm/mach-omap2/pdata-quirks.c
++++ b/arch/arm/mach-omap2/pdata-quirks.c
+@@ -50,8 +50,8 @@ static void __init __used legacy_init_wl
+ {
+ int res;
+
+- wl12xx.board_ref_clock = ref_clock;
+- wl12xx.board_tcxo_clock = tcxo_clock;
++ wl12xx.ref_clock_freq = ref_clock;
++ wl12xx.tcxo_clock_freq = tcxo_clock;
+ wl12xx.irq = gpio_to_irq(gpio);
+
+ res = wl12xx_set_platform_data(&wl12xx);
+@@ -85,12 +85,12 @@ static void __init omap3_igep0020_legacy
+
+ static void __init omap3_evm_legacy_init(void)
+ {
+- legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
++ legacy_init_wl12xx(38400000, 0, 149);
+ }
+
+ static void __init omap3_zoom_legacy_init(void)
+ {
+- legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162);
++ legacy_init_wl12xx(26000000, 0, 162);
+ }
+ #endif /* CONFIG_ARCH_OMAP3 */
+
+@@ -98,15 +98,15 @@ static void __init omap3_zoom_legacy_ini
+ static void __init omap4_sdp_legacy_init(void)
+ {
+ omap_4430sdp_display_init_of();
+- legacy_init_wl12xx(WL12XX_REFCLOCK_26,
+- WL12XX_TCXOCLOCK_26, 53);
++ legacy_init_wl12xx(26000000,
++ 26000000, 53);
+ }
+
+ static void __init omap4_panda_legacy_init(void)
+ {
+ omap4_panda_display_init_of();
+ legacy_init_ehci_clk("auxclk3_ck");
+- legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
++ legacy_init_wl12xx(38400000, 0, 53);
+ }
+ #endif
+