aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch')
-rw-r--r--target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch b/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
index c24126284b..20a67676e3 100644
--- a/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
+++ b/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -803,6 +803,8 @@
+@@ -805,6 +805,8 @@
reg = <0 0x1a143000 0 0x1000>;
reg-names = "port0";
mediatek,pcie-cfg = <&pciecfg>;
@@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
-@@ -820,6 +822,7 @@
+@@ -822,6 +824,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
@@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
-@@ -846,6 +849,8 @@
+@@ -848,6 +851,8 @@
reg = <0 0x1a145000 0 0x1000>;
reg-names = "port1";
mediatek,pcie-cfg = <&pciecfg>;
@@ -36,7 +36,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
-@@ -864,6 +869,7 @@
+@@ -866,6 +871,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
status = "disabled";
@@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
-@@ -923,6 +929,11 @@
+@@ -925,6 +931,11 @@
};
};