aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch')
-rw-r--r--target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch12
1 files changed, 6 insertions, 6 deletions
diff --git a/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch b/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
index 4c2fd18b3b..691a7c0398 100644
--- a/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
+++ b/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
@@ -84,7 +84,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
static void phy_parse_property(struct mtk_tphy *tphy,
struct mtk_phy_instance *instance)
{
-@@ -1143,6 +1186,40 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1144,6 +1187,40 @@ static int phy_efuse_get(struct mtk_tphy
dev_dbg(dev, "u3 efuse - intr %x, rx_imp %x, tx_imp %x\n",
instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);
@@ -125,7 +125,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
break;
default:
dev_err(dev, "no sw efuse for type %d\n", instance->type);
-@@ -1174,6 +1251,31 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1175,6 +1252,31 @@ static void phy_efuse_set(struct mtk_phy
writel(tmp, u2_banks->com + U3P_USBPHYACR1);
break;
case PHY_TYPE_USB3:
@@ -157,7 +157,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
case PHY_TYPE_PCIE:
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
-@@ -1195,6 +1297,34 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1196,6 +1298,34 @@ static void phy_efuse_set(struct mtk_phy
tmp &= ~P3A_RG_IEXT_INTR;
tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
@@ -192,7 +192,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
break;
default:
dev_warn(dev, "no sw efuse for type %d\n", instance->type);
-@@ -1334,6 +1464,9 @@ static struct phy *mtk_phy_xlate(struct
+@@ -1335,6 +1465,9 @@ static struct phy *mtk_phy_xlate(struct
case MTK_PHY_V3:
phy_v2_banks_init(tphy, instance);
break;
@@ -202,7 +202,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
default:
dev_err(dev, "phy version is not supported\n");
return ERR_PTR(-EINVAL);
-@@ -1374,6 +1507,12 @@ static const struct mtk_phy_pdata tphy_v
+@@ -1375,6 +1508,12 @@ static const struct mtk_phy_pdata tphy_v
.version = MTK_PHY_V3,
};
@@ -215,7 +215,7 @@ Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
static const struct mtk_phy_pdata mt8173_pdata = {
.avoid_rx_sen_degradation = true,
.version = MTK_PHY_V1,
-@@ -1393,6 +1532,7 @@ static const struct of_device_id mtk_tph
+@@ -1394,6 +1533,7 @@ static const struct of_device_id mtk_tph
{ .compatible = "mediatek,generic-tphy-v1", .data = &tphy_v1_pdata },
{ .compatible = "mediatek,generic-tphy-v2", .data = &tphy_v2_pdata },
{ .compatible = "mediatek,generic-tphy-v3", .data = &tphy_v3_pdata },