diff options
Diffstat (limited to 'target/linux/mediatek/patches-4.9/0017-clk-add-hifsys-reset.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.9/0017-clk-add-hifsys-reset.patch | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.9/0017-clk-add-hifsys-reset.patch b/target/linux/mediatek/patches-4.9/0017-clk-add-hifsys-reset.patch new file mode 100644 index 0000000000..60940f3239 --- /dev/null +++ b/target/linux/mediatek/patches-4.9/0017-clk-add-hifsys-reset.patch @@ -0,0 +1,31 @@ +From f7121d2b19ddad33a09408a2c5923bfd95da8533 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Wed, 6 Jan 2016 20:06:49 +0100 +Subject: [PATCH 017/102] clk: add hifsys reset + +Hi, + +small patch to add hifsys reset bits. Maybe you could add it to the next +version of your patch series. i have teste scpsys and clk on mt7623 today +and it works well. + +thanks, + John + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + drivers/clk/mediatek/clk-mt2701.c | 2 ++ + include/dt-bindings/reset-controller/mt2701-resets.h | 9 +++++++++ + 2 files changed, 11 insertions(+) + +--- a/drivers/clk/mediatek/clk-mt2701.c ++++ b/drivers/clk/mediatek/clk-mt2701.c +@@ -1000,6 +1000,8 @@ + if (r) + pr_err("%s(): could not register clock provider: %d\n", + __func__, r); ++ ++ mtk_register_reset_controller(node, 1, 0x34); + } + CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init); + |