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Diffstat (limited to 'target/linux/layerscape/patches-5.4/801-audio-0032-MLK-16130-1-ASoC-fsl_sai-enable-TCE-RCE-according-to.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/801-audio-0032-MLK-16130-1-ASoC-fsl_sai-enable-TCE-RCE-according-to.patch72
1 files changed, 72 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/801-audio-0032-MLK-16130-1-ASoC-fsl_sai-enable-TCE-RCE-according-to.patch b/target/linux/layerscape/patches-5.4/801-audio-0032-MLK-16130-1-ASoC-fsl_sai-enable-TCE-RCE-according-to.patch
new file mode 100644
index 0000000000..25275a27a2
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/801-audio-0032-MLK-16130-1-ASoC-fsl_sai-enable-TCE-RCE-according-to.patch
@@ -0,0 +1,72 @@
+From 1b4638a9fa32d8a786e71a2a8813b2e1a3c15830 Mon Sep 17 00:00:00 2001
+From: Shengjiu Wang <shengjiu.wang@freescale.com>
+Date: Tue, 1 Aug 2017 16:10:38 +0800
+Subject: [PATCH] MLK-16130-1: ASoC: fsl_sai: enable TCE/RCE according to input
+ channels
+
+If there is only two channels input and slots is 2, then enable one
+port is enough for data transfer. so enable the TCE/RCE according to
+the input channels and slots configuration.
+
+Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
+---
+ sound/soc/fsl/fsl_sai.c | 13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/fsl/fsl_sai.c
++++ b/sound/soc/fsl/fsl_sai.c
+@@ -487,11 +487,14 @@ static int fsl_sai_hw_params(struct snd_
+ u32 val_cr4 = 0, val_cr5 = 0;
+ u32 slots = (channels == 1) ? 2 : channels;
+ u32 slot_width = word_width;
++ u32 pins;
+ int ret;
+
+ if (sai->slots)
+ slots = sai->slots;
+
++ pins = DIV_ROUND_UP(channels, slots);
++
+ if (sai->slot_width)
+ slot_width = sai->slot_width;
+
+@@ -558,6 +561,10 @@ static int fsl_sai_hw_params(struct snd_
+ FSL_SAI_CR4_FCOMB_MASK, FSL_SAI_CR4_FCOMB_SOFT);
+ }
+
++ regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
++ FSL_SAI_CR3_TRCE_MASK,
++ FSL_SAI_CR3_TRCE((sai->dataline[tx] & ((1 << pins) - 1))));
++
+ regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, offset),
+ FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
+ val_cr4);
+@@ -573,8 +580,12 @@ static int fsl_sai_hw_free(struct snd_pc
+ struct snd_soc_dai *cpu_dai)
+ {
+ struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
++ unsigned char offset = sai->soc->reg_offset;
+ bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+
++ regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
++ FSL_SAI_CR3_TRCE_MASK, 0);
++
+ if (!sai->slave_mode[tx] &&
+ sai->mclk_streams & BIT(substream->stream)) {
+ clk_disable_unprepare(sai->mclk_clk[sai->mclk_id[tx]]);
+@@ -694,7 +705,6 @@ static int fsl_sai_startup(struct snd_pc
+ struct snd_soc_dai *cpu_dai)
+ {
+ struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+- unsigned char offset = sai->soc->reg_offset;
+ bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+ int ret;
+
+@@ -724,7 +734,6 @@ static void fsl_sai_shutdown(struct snd_
+ struct snd_soc_dai *cpu_dai)
+ {
+ struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+- unsigned char offset = sai->soc->reg_offset;
+ bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+
+ regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);