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-rw-r--r--target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch81
1 files changed, 81 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch b/target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch
new file mode 100644
index 0000000000..8347b4f843
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch
@@ -0,0 +1,81 @@
+From e2b301610e6201df40deb62942b18c772365eb1c Mon Sep 17 00:00:00 2001
+From: Shaohui Xie <Shaohui.Xie@freescale.com>
+Date: Thu, 21 Jan 2016 11:29:22 +0800
+Subject: [PATCH 13/70] dts: ls1043ardb: add mdio & phy nodes
+
+Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 65 +++++++++++++++++++++
+ 1 file changed, 65 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+@@ -115,3 +115,68 @@
+ &duart1 {
+ status = "okay";
+ };
++
++&fman0 {
++ ethernet@e0000 {
++ phy-handle = <&qsgmii_phy1>;
++ phy-connection-type = "qsgmii";
++ };
++
++ ethernet@e2000 {
++ phy-handle = <&qsgmii_phy2>;
++ phy-connection-type = "qsgmii";
++ };
++
++ ethernet@e4000 {
++ phy-handle = <&rgmii_phy1>;
++ phy-connection-type = "rgmii";
++ };
++
++ ethernet@e6000 {
++ phy-handle = <&rgmii_phy2>;
++ phy-connection-type = "rgmii";
++ };
++
++ ethernet@e8000 {
++ phy-handle = <&qsgmii_phy3>;
++ phy-connection-type = "qsgmii";
++ };
++
++ ethernet@ea000 {
++ phy-handle = <&qsgmii_phy4>;
++ phy-connection-type = "qsgmii";
++ };
++
++ ethernet@f0000 { /* 10GEC1 */
++ phy-handle = <&aqr105_phy>;
++ phy-connection-type = "xgmii";
++ };
++
++ mdio@fc000 {
++ rgmii_phy1: ethernet-phy@1 {
++ reg = <0x1>;
++ };
++ rgmii_phy2: ethernet-phy@2 {
++ reg = <0x2>;
++ };
++ qsgmii_phy1: ethernet-phy@3 {
++ reg = <0x4>;
++ };
++ qsgmii_phy2: ethernet-phy@4 {
++ reg = <0x5>;
++ };
++ qsgmii_phy3: ethernet-phy@5 {
++ reg = <0x6>;
++ };
++ qsgmii_phy4: ethernet-phy@6 {
++ reg = <0x7>;
++ };
++ };
++
++ mdio@fd000 {
++ aqr105_phy: ethernet-phy@c {
++ compatible = "ethernet-phy-ieee802.3-c45";
++ reg = <0x1>;
++ };
++ };
++};