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-rw-r--r--target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi20
-rw-r--r--target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi20
-rw-r--r--target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch8
3 files changed, 32 insertions, 16 deletions
diff --git a/target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
index e74d2dcdbd..e5282efaab 100644
--- a/target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
+++ b/target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
@@ -12,6 +12,18 @@
};
};
+&qcom_pinmux {
+ /* eax500 routers reuse the pcie2 reset pin for switch reset pin */
+ switch_reset: switch_reset_pins {
+ mux {
+ pins = "gpio63";
+ function = "gpio";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ };
+};
+
&usb3_0 {
status = "okay";
};
@@ -30,10 +42,6 @@
status = "okay";
};
-&pcie2 {
- status = "okay";
-};
-
&nand {
status = "okay";
@@ -160,6 +168,10 @@
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
+ /* Switch from documentation require at least 10ms for reset */
+ reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
+ reset-post-delay-us = <12000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
index adf5192ac8..910bd86bc5 100644
--- a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
@@ -12,6 +12,18 @@
};
};
+&qcom_pinmux {
+ /* eax500 routers reuse the pcie2 reset pin for switch reset pin */
+ switch_reset: switch_reset_pins {
+ mux {
+ pins = "gpio63";
+ function = "gpio";
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ };
+};
+
&hs_phy_0 {
status = "okay";
};
@@ -46,10 +58,6 @@
status = "okay";
};
-&pcie2 {
- status = "okay";
-};
-
&nand {
status = "okay";
@@ -173,6 +181,10 @@
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
+ /* Switch from documentation require at least 10ms for reset */
+ reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
+ reset-post-delay-us = <12000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
diff --git a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
index d6a4593749..301963f4f9 100644
--- a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
+++ b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
@@ -35,14 +35,6 @@
#interrupt-cells = <2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-@@ -155,6 +156,7 @@
- function = "pcie3_rst";
- drive-strength = <12>;
- bias-disable;
-+ output-low;
- };
- };
-
@@ -190,6 +192,7 @@
intc: interrupt-controller@2000000 {
compatible = "qcom,msm-qgic2";