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-rw-r--r--target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch55
1 files changed, 55 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch b/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch
new file mode 100644
index 0000000000..fc57727b37
--- /dev/null
+++ b/target/linux/ipq806x/patches/0011-devicetree-bindings-Document-qcom-kpss-acc.patch
@@ -0,0 +1,55 @@
+From 3a4fe9a3a4aff8b1f1c3685bc9b6adbe739d7367 Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Thu, 31 Oct 2013 18:20:30 -0700
+Subject: [PATCH 011/182] devicetree: bindings: Document qcom,kpss-acc
+
+The kpss acc binding describes the clock, reset, and power domain
+controller for a Krait CPU.
+
+Cc: <devicetree@vger.kernel.org>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Kumar Gala <galak@codeaurora.org>
+---
+ .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 30 ++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+
+diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+new file mode 100644
+index 0000000..1333db9
+--- /dev/null
++++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+@@ -0,0 +1,30 @@
++Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
++
++The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.
++There is one ACC register region per CPU within the KPSS remapped region as
++well as an alias register region that remaps accesses to the ACC associated
++with the CPU accessing the region.
++
++PROPERTIES
++
++- compatible:
++ Usage: required
++ Value type: <string>
++ Definition: should be one of:
++ "qcom,kpss-acc-v1"
++ "qcom,kpss-acc-v2"
++
++- reg:
++ Usage: required
++ Value type: <prop-encoded-array>
++ Definition: the first element specifies the base address and size of
++ the register region. An optional second element specifies
++ the base address and size of the alias register region.
++
++Example:
++
++ clock-controller@2088000 {
++ compatible = "qcom,kpss-acc-v2";
++ reg = <0x02088000 0x1000>,
++ <0x02008000 0x1000>;
++ };
+--
+1.7.10.4
+