diff options
Diffstat (limited to 'target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch')
-rw-r--r-- | target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch | 65 |
1 files changed, 0 insertions, 65 deletions
diff --git a/target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch b/target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch deleted file mode 100644 index 751aa8510f..0000000000 --- a/target/linux/ipq806x/patches/0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 236d07c7bb0c758ea40ea0110d37306d2e7d9a4b Mon Sep 17 00:00:00 2001 -From: Rohit Vaswani <rvaswani@codeaurora.org> -Date: Thu, 31 Oct 2013 17:26:33 -0700 -Subject: [PATCH 010/182] devicetree: bindings: Document Krait/Scorpion cpus - and enable-method - -Scorpion and Krait don't use the spin-table enable-method. -Instead they rely on mmio register accesses to enable power and -clocks to bring CPUs out of reset. Document their enable-methods. - -Cc: <devicetree@vger.kernel.org> -Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> -[sboyd: Split off into separate patch, renamed methods to -match compatible nodes] -Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> -Signed-off-by: Kumar Gala <galak@codeaurora.org> ---- - Documentation/devicetree/bindings/arm/cpus.txt | 25 +++++++++++++++++++++++- - 1 file changed, 24 insertions(+), 1 deletion(-) - ---- a/Documentation/devicetree/bindings/arm/cpus.txt -+++ b/Documentation/devicetree/bindings/arm/cpus.txt -@@ -180,7 +180,11 @@ nodes to be present and contain the prop - be one of: - "spin-table" - "psci" -- # On ARM 32-bit systems this property is optional. -+ # On ARM 32-bit systems this property is optional and -+ can be one of: -+ "qcom,gcc-msm8660" -+ "qcom,kpss-acc-v1" -+ "qcom,kpss-acc-v2" - - - cpu-release-addr - Usage: required for systems that have an "enable-method" -@@ -191,6 +195,21 @@ nodes to be present and contain the prop - property identifying a 64-bit zero-initialised - memory location. - -+ - qcom,saw -+ Usage: required for systems that have an "enable-method" -+ property value of "qcom,kpss-acc-v1" or -+ "qcom,kpss-acc-v2" -+ Value type: <phandle> -+ Definition: Specifies the SAW[1] node associated with this CPU. -+ -+ - qcom,acc -+ Usage: required for systems that have an "enable-method" -+ property value of "qcom,kpss-acc-v1" or -+ "qcom,kpss-acc-v2" -+ Value type: <phandle> -+ Definition: Specifies the ACC[2] node associated with this CPU. -+ -+ - Example 1 (dual-cluster big.LITTLE system 32-bit): - - cpus { -@@ -382,3 +401,7 @@ cpus { - cpu-release-addr = <0 0x20000000>; - }; - }; -+ -+-- -+[1] arm/msm/qcom,saw2.txt -+[2] arm/msm/qcom,kpss-acc.txt |