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Diffstat (limited to 'target/linux/ipq806x/patches-5.15/082-ipq8064-dtsi-tweaks.patch')
-rw-r--r--target/linux/ipq806x/patches-5.15/082-ipq8064-dtsi-tweaks.patch220
1 files changed, 220 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.15/082-ipq8064-dtsi-tweaks.patch b/target/linux/ipq806x/patches-5.15/082-ipq8064-dtsi-tweaks.patch
new file mode 100644
index 0000000000..d6a4593749
--- /dev/null
+++ b/target/linux/ipq806x/patches-5.15/082-ipq8064-dtsi-tweaks.patch
@@ -0,0 +1,220 @@
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -20,7 +20,7 @@
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+- cpu@0 {
++ cpu0: cpu@0 {
+ compatible = "qcom,krait";
+ enable-method = "qcom,kpss-acc-v1";
+ device_type = "cpu";
+@@ -30,7 +30,7 @@
+ qcom,saw = <&saw0>;
+ };
+
+- cpu@1 {
++ cpu1: cpu@1 {
+ compatible = "qcom,krait";
+ enable-method = "qcom,kpss-acc-v1";
+ device_type = "cpu";
+@@ -67,7 +67,7 @@
+ no-map;
+ };
+
+- smem@41000000 {
++ smem: smem@41000000 {
+ reg = <0x41000000 0x200000>;
+ no-map;
+ };
+@@ -128,6 +128,7 @@
+ gpio-ranges = <&qcom_pinmux 0 0 69>;
+ #gpio-cells = <2>;
+ interrupt-controller;
++ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+
+@@ -155,6 +156,7 @@
+ function = "pcie3_rst";
+ drive-strength = <12>;
+ bias-disable;
++ output-low;
+ };
+ };
+
+@@ -190,6 +192,7 @@
+ intc: interrupt-controller@2000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
++ #address-cells = <0>;
+ #interrupt-cells = <3>;
+ reg = <0x02000000 0x1000>,
+ <0x02002000 0x1000>;
+@@ -219,21 +222,23 @@
+ acc0: clock-controller@2088000 {
+ compatible = "qcom,kpss-acc-v1";
+ reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
++ clock-output-names = "acpu0_aux";
+ };
+
+ acc1: clock-controller@2098000 {
+ compatible = "qcom,kpss-acc-v1";
+ reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
++ clock-output-names = "acpu1_aux";
+ };
+
+ saw0: regulator@2089000 {
+- compatible = "qcom,saw2";
++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+ reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
+ regulator;
+ };
+
+ saw1: regulator@2099000 {
+- compatible = "qcom,saw2";
++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+ reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
+ regulator;
+ };
+@@ -251,7 +256,7 @@
+
+ syscon-tcsr = <&tcsr>;
+
+- serial@12490000 {
++ gsbi2_serial: serial@12490000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x12490000 0x1000>,
+ <0x12480000 0x1000>;
+@@ -261,7 +266,7 @@
+ status = "disabled";
+ };
+
+- i2c@124a0000 {
++ gsbi2_i2c: i2c@124a0000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x124a0000 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
+@@ -326,7 +331,7 @@
+
+ syscon-tcsr = <&tcsr>;
+
+- serial@1a240000 {
++ gsbi5_serial: serial@1a240000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x1a240000 0x1000>,
+ <0x1a200000 0x1000>;
+@@ -397,7 +402,7 @@
+ status = "disabled";
+ };
+
+- sata@29000000 {
++ sata: sata@29000000 {
+ compatible = "qcom,ipq806x-ahci", "generic-ahci";
+ reg = <0x29000000 0x180>;
+
+@@ -430,13 +435,35 @@
+ reg = <0x00700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
++
++ tsens_calib: calib@400 {
++ reg = <0x400 0xb>;
++ };
++ tsens_backup: backup@410 {
++ reg = <0x410 0xb>;
++ };
++ speedbin_efuse: speedbin@0c0 {
++ reg = <0x0c0 0x4>;
++ };
+ };
+
+ gcc: clock-controller@900000 {
+- compatible = "qcom,gcc-ipq8064";
++ compatible = "qcom,gcc-ipq8064", "syscon";
+ reg = <0x00900000 0x4000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
++ #power-domain-cells = <1>;
++
++ tsens: thermal-sensor@900000 {
++ compatible = "qcom,ipq8064-tsens";
++
++ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
++ nvmem-cell-names = "calib", "calib_backup";
++ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "uplow";
++ #thermal-sensor-cells = <1>;
++ #qcom,sensors = <11>;
++ };
+ };
+
+ tcsr: syscon@1a400000 {
+@@ -622,7 +649,7 @@
+
+ gmac0: ethernet@37000000 {
+ device_type = "network";
+- compatible = "qcom,ipq806x-gmac";
++ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37000000 0x200000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+@@ -645,7 +672,7 @@
+
+ gmac1: ethernet@37200000 {
+ device_type = "network";
+- compatible = "qcom,ipq806x-gmac";
++ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37200000 0x200000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+@@ -668,7 +695,7 @@
+
+ gmac2: ethernet@37400000 {
+ device_type = "network";
+- compatible = "qcom,ipq806x-gmac";
++ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37400000 0x200000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+@@ -691,7 +718,7 @@
+
+ gmac3: ethernet@37600000 {
+ device_type = "network";
+- compatible = "qcom,ipq806x-gmac";
++ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37600000 0x200000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+@@ -740,13 +767,13 @@
+ qcom,ee = <0>;
+ };
+
+- amba {
+- compatible = "simple-bus";
++ amba: amba {
++ compatible = "arm,amba-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+- sdcc@12400000 {
++ sdcc1: sdcc@12400000 {
+ status = "disabled";
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+@@ -760,13 +787,12 @@
+ non-removable;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+- mmc-ddr-1_8v;
+ vmmc-supply = <&vsdcc_fixed>;
+ dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+ dma-names = "tx", "rx";
+ };
+
+- sdcc@12180000 {
++ sdcc3: sdcc@12180000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ status = "disabled";