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Diffstat (limited to 'target/linux/ipq806x/patches-5.10/087-v5.8-ipq8064-pinctrl-Fixed-missing-RGMII-pincontrol-defin.patch')
-rw-r--r--target/linux/ipq806x/patches-5.10/087-v5.8-ipq8064-pinctrl-Fixed-missing-RGMII-pincontrol-defin.patch56
1 files changed, 56 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-5.10/087-v5.8-ipq8064-pinctrl-Fixed-missing-RGMII-pincontrol-defin.patch b/target/linux/ipq806x/patches-5.10/087-v5.8-ipq8064-pinctrl-Fixed-missing-RGMII-pincontrol-defin.patch
new file mode 100644
index 0000000000..612c33cd0e
--- /dev/null
+++ b/target/linux/ipq806x/patches-5.10/087-v5.8-ipq8064-pinctrl-Fixed-missing-RGMII-pincontrol-defin.patch
@@ -0,0 +1,56 @@
+From 8d8cec9bf6e9260397872785f249dfb59a417d08 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <ansuelsmth@gmail.com>
+Date: Wed, 19 Feb 2020 18:59:39 +0100
+Subject: ipq8064: pinctrl: Fixed missing RGMII pincontrol definitions
+
+Add missing gpio definition for mdio and rgmii2.
+
+Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+Link: https://lore.kernel.org/r/20200219175940.744-1-ansuelsmth@gmail.com
+Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/qcom/pinctrl-ipq8064.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
++++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
+@@ -299,7 +299,7 @@ static const char * const gpio_groups[]
+ };
+
+ static const char * const mdio_groups[] = {
+- "gpio0", "gpio1", "gpio10", "gpio11",
++ "gpio0", "gpio1", "gpio2", "gpio10", "gpio11", "gpio66",
+ };
+
+ static const char * const mi2s_groups[] = {
+@@ -403,8 +403,8 @@ static const char * const usb2_hsic_grou
+ };
+
+ static const char * const rgmii2_groups[] = {
+- "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
+- "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62",
++ "gpio2", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
++ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62", "gpio66",
+ };
+
+ static const char * const sata_groups[] = {
+@@ -539,7 +539,7 @@ static const struct msm_function ipq8064
+ static const struct msm_pingroup ipq8064_groups[] = {
+ PINGROUP(0, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(1, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+- PINGROUP(2, gsbi5_spi_cs3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
++ PINGROUP(2, gsbi5_spi_cs3, rgmii2, mdio, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(3, pcie1_rst, pcie1_prsnt, pdm, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(4, pcie1_pwren_n, pcie1_pwren, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(5, pcie1_clk_req, pcie1_pwrflt, NA, NA, NA, NA, NA, NA, NA, NA),
+@@ -603,7 +603,7 @@ static const struct msm_pingroup ipq8064
+ PINGROUP(63, pcie3_rst, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(65, pcie3_clk_req, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+- PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
++ PINGROUP(66, rgmii2, mdio, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(67, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(68, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ SDC_PINGROUP(sdc3_clk, 0x204a, 14, 6),