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-rw-r--r--target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch500
1 files changed, 134 insertions, 366 deletions
diff --git a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
index 221ecd7396..be4ccc8e12 100644
--- a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
+++ b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
@@ -26,10 +26,16 @@
};
cpu1: cpu@1 {
-@@ -38,11 +50,458 @@
- next-level-cache = <&L2>;
- qcom,acc = <&acc1>;
- qcom,saw = <&saw1>;
+@@ -47,17 +47,350 @@
+ enable-method = "qcom,kpss-acc-v1";
+ device_type = "cpu";
+ reg = <1>;
+- next-level-cache = <&L2>;
+- qcom,acc = <&acc1>;
+- qcom,saw = <&saw1>;
++ next-level-cache = <&L2>;
++ qcom,acc = <&acc1>;
++ qcom,saw = <&saw1>;
+ clocks = <&kraitcc 1>, <&kraitcc 4>;
+ clock-names = "cpu", "l2";
+ clock-latency = <100000>;
@@ -40,29 +46,44 @@
+ cooling-max-state = <10>;
+ #cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SPC>;
- };
-
- L2: l2-cache {
- compatible = "cache";
- cache-level = <2>;
-+ qcom,saw = <&saw_l2>;
-+ };
-+
-+ qcom,l2 {
-+ qcom,l2-rates = <384000000 1000000000 1200000000>;
-+ qcom,l2-cpufreq = <384000000 600000000 1200000000>;
-+ qcom,l2-volt = <1100000 1100000 1150000>;
-+ qcom,l2-supply = <&smb208_s1a>;
-+ };
++ };
+
+ idle-states {
+ CPU_SPC: spc {
-+ compatible = "qcom,idle-state-spc", "arm,idle-state";
++ compatible = "qcom,idle-state-spc";
+ status = "disabled";
+ entry-latency-us = <400>;
+ exit-latency-us = <900>;
+ min-residency-us = <3000>;
+ };
+ };
++ };
+
+- L2: l2-cache {
+- compatible = "cache";
+- cache-level = <2>;
++ opp_table_l2: opp_table_l2 {
++ compatible = "operating-points-v2";
++
++ opp-384000000 {
++ opp-hz = /bits/ 64 <384000000>;
++ opp-microvolt = <1100000>;
++ clock-latency-ns = <100000>;
++ opp-level = <0>;
++ };
++
++ opp-1000000000 {
++ opp-hz = /bits/ 64 <1000000000>;
++ opp-microvolt = <1100000>;
++ clock-latency-ns = <100000>;
++ opp-level = <1>;
++ };
++
++ opp-1200000000 {
++ opp-hz = /bits/ 64 <1200000000>;
++ opp-microvolt = <1150000>;
++ clock-latency-ns = <100000>;
++ opp-level = <2>;
+ };
+ };
+
@@ -72,65 +93,71 @@
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1000000>;
-+ opp-microvolt-speed0-pvs1-v0 = <925000>;
-+ opp-microvolt-speed0-pvs2-v0 = <875000>;
-+ opp-microvolt-speed0-pvs3-v0 = <800000>;
++ opp-microvolt-speed0-pvs0-v0 = <995000 1000000 1005000>;
++ opp-microvolt-speed0-pvs1-v0 = <920000 925000 930000>;
++ opp-microvolt-speed0-pvs2-v0 = <870000 875000 880000>;
++ opp-microvolt-speed0-pvs3-v0 = <795000 800000 805000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
++ opp-level = <0>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1050000>;
-+ opp-microvolt-speed0-pvs1-v0 = <975000>;
-+ opp-microvolt-speed0-pvs2-v0 = <925000>;
-+ opp-microvolt-speed0-pvs3-v0 = <850000>;
++ opp-microvolt-speed0-pvs0-v0 = <1045000 1050000 1055000>;
++ opp-microvolt-speed0-pvs1-v0 = <970000 975000 980000>;
++ opp-microvolt-speed0-pvs2-v0 = <920000 925000 930000>;
++ opp-microvolt-speed0-pvs3-v0 = <845000 850000 855000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
++ opp-level = <1>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1100000>;
-+ opp-microvolt-speed0-pvs1-v0 = <1025000>;
-+ opp-microvolt-speed0-pvs2-v0 = <995000>;
-+ opp-microvolt-speed0-pvs3-v0 = <900000>;
++ opp-microvolt-speed0-pvs0-v0 = <1095000 1100000 1105000>;
++ opp-microvolt-speed0-pvs1-v0 = <1020000 1025000 1030000>;
++ opp-microvolt-speed0-pvs2-v0 = <990000 995000 1000000>;
++ opp-microvolt-speed0-pvs3-v0 = <895000 900000 905000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
++ opp-level = <1>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1150000>;
-+ opp-microvolt-speed0-pvs1-v0 = <1075000>;
-+ opp-microvolt-speed0-pvs2-v0 = <1025000>;
-+ opp-microvolt-speed0-pvs3-v0 = <950000>;
++ opp-microvolt-speed0-pvs0-v0 = <1145000 1150000 1155000>;
++ opp-microvolt-speed0-pvs1-v0 = <1070000 1075000 1080000>;
++ opp-microvolt-speed0-pvs2-v0 = <1020000 1025000 1030000>;
++ opp-microvolt-speed0-pvs3-v0 = <945000 950000 955000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
++ opp-level = <1>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1200000>;
-+ opp-microvolt-speed0-pvs1-v0 = <1125000>;
-+ opp-microvolt-speed0-pvs2-v0 = <1075000>;
-+ opp-microvolt-speed0-pvs3-v0 = <1000000>;
++ opp-microvolt-speed0-pvs0-v0 = <1195000 1200000 1205000>;
++ opp-microvolt-speed0-pvs1-v0 = <1120000 1125000 1130000>;
++ opp-microvolt-speed0-pvs2-v0 = <1070000 1075000 1080000>;
++ opp-microvolt-speed0-pvs3-v0 = <995000 1000000 1005000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
++ opp-level = <2>;
+ };
+
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
-+ opp-microvolt-speed0-pvs0-v0 = <1250000>;
-+ opp-microvolt-speed0-pvs1-v0 = <1175000>;
-+ opp-microvolt-speed0-pvs2-v0 = <1125000>;
-+ opp-microvolt-speed0-pvs3-v0 = <1050000>;
++ opp-microvolt-speed0-pvs0-v0 = <1245000 1250000 1255000>;
++ opp-microvolt-speed0-pvs1-v0 = <1170000 1175000 1180000>;
++ opp-microvolt-speed0-pvs2-v0 = <1120000 1125000 1130000>;
++ opp-microvolt-speed0-pvs3-v0 = <1045000 1050000 1055000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
-+ };
-+ };
-+
++ opp-level = <2>;
+ };
+ };
+
+ thermal-zones {
+ tsens_tz_sensor0 {
+ polling-delay-passive = <0>;
@@ -138,28 +165,16 @@
+ thermal-sensors = <&tsens 0>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -170,28 +185,16 @@
+ thermal-sensors = <&tsens 1>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -202,28 +205,16 @@
+ thermal-sensors = <&tsens 2>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -234,28 +225,16 @@
+ thermal-sensors = <&tsens 3>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -266,28 +245,16 @@
+ thermal-sensors = <&tsens 4>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -298,28 +265,16 @@
+ thermal-sensors = <&tsens 5>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -330,28 +285,16 @@
+ thermal-sensors = <&tsens 6>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -362,28 +305,16 @@
+ thermal-sensors = <&tsens 7>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -394,28 +325,16 @@
+ thermal-sensors = <&tsens 8>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -426,28 +345,16 @@
+ thermal-sensors = <&tsens 9>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
+ };
@@ -458,33 +365,24 @@
+ thermal-sensors = <&tsens 10>;
+
+ trips {
-+ cpu-critical-hi {
-+ temperature = <125000>;
-+ hysteresis = <2000>;
-+ type = "critical_high";
-+ };
-+
-+ cpu-config-hi {
++ cpu-critical {
+ temperature = <105000>;
+ hysteresis = <2000>;
-+ type = "configurable_hi";
++ type = "critical";
+ };
+
-+ cpu-config-lo {
++ cpu-hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
-+ type = "configurable_lo";
-+ };
-+
-+ cpu-critical-low {
-+ temperature = <0>;
-+ hysteresis = <2000>;
-+ type = "critical_low";
++ type = "hot";
+ };
+ };
- };
- };
-
++ };
++ };
++
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0>;
@@ -93,6 +552,15 @@
};
};
@@ -501,25 +399,19 @@
firmware {
scm {
compatible = "qcom,scm-ipq806x", "qcom,scm";
-@@ -120,6 +588,84 @@
+@@ -120,6 +588,78 @@
reg-names = "lpass-lpaif";
};
-+ qfprom: qfprom@700000 {
-+ compatible = "qcom,qfprom", "syscon";
-+ reg = <0x700000 0x1000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ status = "okay";
-+ tsens_calib: calib@400 {
-+ reg = <0x400 0xb>;
-+ };
-+ tsens_backup: backup@410 {
-+ reg = <0x410 0xb>;
-+ };
-+ speedbin_efuse: speedbin@0c0 {
-+ reg = <0x0c0 0x4>;
-+ };
++ L2: l2-cache {
++ compatible = "qcom,krait-cache", "cache";
++ cache-level = <2>;
++ qcom,saw = <&saw_l2>;
++
++ clocks = <&kraitcc 4>;
++ clock-names = "l2";
++ l2-supply = <&smb208_s1a>;
++ operating-points-v2 = <&opp_table_l2>;
+ };
+
+ rpm: rpm@108000 {
@@ -692,22 +584,6 @@
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
-@@ -436,6 +1060,15 @@
- #power-domain-cells = <1>;
- };
-
-+ tsens: thermal-sensor@900000 {
-+ compatible = "qcom,ipq8064-tsens";
-+ reg = <0x900000 0x3680>;
-+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
-+ nvmem-cell-names = "calib", "calib_backup";
-+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
-+ #thermal-sensor-cells = <1>;
-+ };
-+
- tcsr: syscon@1a400000 {
- compatible = "qcom,tcsr-ipq8064", "syscon";
- reg = <0x1a400000 0x100>;
@@ -448,6 +1081,95 @@
#reset-cells = <1>;
};
@@ -804,7 +680,7 @@
pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000
-@@ -601,6 +1323,167 @@
+@@ -601,6 +1323,59 @@
perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
};
@@ -847,22 +723,6 @@
+ #size-cells = <0>;
+ };
+
-+ nss_common: syscon@03000000 {
-+ compatible = "syscon";
-+ reg = <0x03000000 0x0000FFFF>;
-+ };
-+
-+ qsgmii_csr: syscon@1bb00000 {
-+ compatible = "syscon";
-+ reg = <0x1bb00000 0x000001FF>;
-+ };
-+
-+ stmmac_axi_setup: stmmac-axi-config {
-+ snps,wr_osr_lmt = <7>;
-+ snps,rd_osr_lmt = <7>;
-+ snps,blen = <16 0 0 0 0 0 0>;
-+ };
-+
+ mdio0: mdio@37000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
@@ -877,98 +737,6 @@
+ status = "disabled";
+ };
+
-+ gmac0: ethernet@37000000 {
-+ device_type = "network";
-+ compatible = "qcom,ipq806x-gmac";
-+ reg = <0x37000000 0x200000>;
-+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+
-+ snps,axi-config = <&stmmac_axi_setup>;
-+ snps,pbl = <32>;
-+ snps,aal = <1>;
-+
-+ qcom,nss-common = <&nss_common>;
-+ qcom,qsgmii-csr = <&qsgmii_csr>;
-+
-+ clocks = <&gcc GMAC_CORE1_CLK>;
-+ clock-names = "stmmaceth";
-+
-+ resets = <&gcc GMAC_CORE1_RESET>;
-+ reset-names = "stmmaceth";
-+
-+ status = "disabled";
-+ };
-+
-+ gmac1: ethernet@37200000 {
-+ device_type = "network";
-+ compatible = "qcom,ipq806x-gmac";
-+ reg = <0x37200000 0x200000>;
-+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+
-+ snps,axi-config = <&stmmac_axi_setup>;
-+ snps,pbl = <32>;
-+ snps,aal = <1>;
-+
-+ qcom,nss-common = <&nss_common>;
-+ qcom,qsgmii-csr = <&qsgmii_csr>;
-+
-+ clocks = <&gcc GMAC_CORE2_CLK>;
-+ clock-names = "stmmaceth";
-+
-+ resets = <&gcc GMAC_CORE2_RESET>;
-+ reset-names = "stmmaceth";
-+
-+ status = "disabled";
-+ };
-+
-+ gmac2: ethernet@37400000 {
-+ device_type = "network";
-+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ reg = <0x37400000 0x200000>;
-+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+
-+ snps,axi-config = <&stmmac_axi_setup>;
-+ snps,pbl = <32>;
-+ snps,aal = <1>;
-+
-+ qcom,nss-common = <&nss_common>;
-+ qcom,qsgmii-csr = <&qsgmii_csr>;
-+
-+ clocks = <&gcc GMAC_CORE3_CLK>;
-+ clock-names = "stmmaceth";
-+
-+ resets = <&gcc GMAC_CORE3_RESET>;
-+ reset-names = "stmmaceth";
-+
-+ status = "disabled";
-+ };
-+
-+ gmac3: ethernet@37600000 {
-+ device_type = "network";
-+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
-+ reg = <0x37600000 0x200000>;
-+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+
-+ snps,axi-config = <&stmmac_axi_setup>;
-+ snps,pbl = <32>;
-+ snps,aal = <1>;
-+
-+ qcom,nss-common = <&nss_common>;
-+ qcom,qsgmii-csr = <&qsgmii_csr>;
-+
-+ clocks = <&gcc GMAC_CORE4_CLK>;
-+ clock-names = "stmmaceth";
-+
-+ resets = <&gcc GMAC_CORE4_RESET>;
-+ reset-names = "stmmaceth";
-+
-+ status = "disabled";
-+ };
-+
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-29 03:19:17 +0000