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path: root/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch
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Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch')
-rw-r--r--target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch8
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch
index 8658d6d255..6a4341fede 100644
--- a/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch
+++ b/target/linux/brcm47xx/patches-2.6.25/220-bcm5354.patch
@@ -1,6 +1,6 @@
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
-@@ -270,6 +270,8 @@
+@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@ -9,7 +9,7 @@
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
-@@ -293,6 +295,8 @@
+@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@ -20,7 +20,7 @@
switch (*plltype) {
--- a/drivers/ssb/driver_mipscore.c
+++ b/drivers/ssb/driver_mipscore.c
-@@ -161,6 +161,8 @@
+@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
rate = 200000000;
@@ -31,7 +31,7 @@
}
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
-@@ -867,6 +867,8 @@
+@@ -867,6 +867,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
if (bus->chip_id == 0x5365) {
rate = 100000000;