diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch b/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch index d91bb5672e..c79ffb5e8e 100644 --- a/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch +++ b/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch @@ -31,7 +31,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> }; struct bcm2835_clock_data { -@@ -1290,7 +1291,7 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1292,7 +1293,7 @@ bcm2835_register_pll_divider(struct bcm2 init.num_parents = 1; init.name = divider_name; init.ops = &bcm2835_pll_divider_clk_ops; @@ -40,7 +40,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL); if (!divider) -@@ -1529,7 +1530,8 @@ static const struct bcm2835_clk_desc clk +@@ -1531,7 +1532,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CORE, .load_mask = CM_PLLA_LOADCORE, .hold_mask = CM_PLLA_HOLDCORE, @@ -50,7 +50,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( .name = "plla_per", .source_pll = "plla", -@@ -1537,7 +1539,8 @@ static const struct bcm2835_clk_desc clk +@@ -1539,7 +1541,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_PER, .load_mask = CM_PLLA_LOADPER, .hold_mask = CM_PLLA_HOLDPER, @@ -60,7 +60,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( .name = "plla_dsi0", .source_pll = "plla", -@@ -1553,7 +1556,8 @@ static const struct bcm2835_clk_desc clk +@@ -1555,7 +1558,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CCP2, .load_mask = CM_PLLA_LOADCCP2, .hold_mask = CM_PLLA_HOLDCCP2, @@ -70,7 +70,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> /* PLLB is used for the ARM's clock. */ [BCM2835_PLLB] = REGISTER_PLL( -@@ -1577,7 +1581,8 @@ static const struct bcm2835_clk_desc clk +@@ -1579,7 +1583,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLB_ARM, .load_mask = CM_PLLB_LOADARM, .hold_mask = CM_PLLB_HOLDARM, @@ -80,7 +80,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> /* * PLLC is the core PLL, used to drive the core VPU clock. -@@ -1606,7 +1611,8 @@ static const struct bcm2835_clk_desc clk +@@ -1608,7 +1613,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE0, .load_mask = CM_PLLC_LOADCORE0, .hold_mask = CM_PLLC_HOLDCORE0, @@ -90,7 +90,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV( .name = "pllc_core1", .source_pll = "pllc", -@@ -1614,7 +1620,8 @@ static const struct bcm2835_clk_desc clk +@@ -1616,7 +1622,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE1, .load_mask = CM_PLLC_LOADCORE1, .hold_mask = CM_PLLC_HOLDCORE1, @@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV( .name = "pllc_core2", .source_pll = "pllc", -@@ -1622,7 +1629,8 @@ static const struct bcm2835_clk_desc clk +@@ -1624,7 +1631,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE2, .load_mask = CM_PLLC_LOADCORE2, .hold_mask = CM_PLLC_HOLDCORE2, @@ -110,7 +110,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLC_PER] = REGISTER_PLL_DIV( .name = "pllc_per", .source_pll = "pllc", -@@ -1630,7 +1638,8 @@ static const struct bcm2835_clk_desc clk +@@ -1632,7 +1640,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_PER, .load_mask = CM_PLLC_LOADPER, .hold_mask = CM_PLLC_HOLDPER, @@ -120,7 +120,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> /* * PLLD is the display PLL, used to drive DSI display panels. -@@ -1659,7 +1668,8 @@ static const struct bcm2835_clk_desc clk +@@ -1661,7 +1670,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_CORE, .load_mask = CM_PLLD_LOADCORE, .hold_mask = CM_PLLD_HOLDCORE, @@ -130,7 +130,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLD_PER] = REGISTER_PLL_DIV( .name = "plld_per", .source_pll = "plld", -@@ -1667,7 +1677,8 @@ static const struct bcm2835_clk_desc clk +@@ -1669,7 +1679,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_PER, .load_mask = CM_PLLD_LOADPER, .hold_mask = CM_PLLD_HOLDPER, @@ -140,7 +140,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( .name = "plld_dsi0", .source_pll = "plld", -@@ -1712,7 +1723,8 @@ static const struct bcm2835_clk_desc clk +@@ -1714,7 +1725,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_RCAL, .load_mask = CM_PLLH_LOADRCAL, .hold_mask = 0, @@ -150,7 +150,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV( .name = "pllh_aux", .source_pll = "pllh", -@@ -1720,7 +1732,8 @@ static const struct bcm2835_clk_desc clk +@@ -1722,7 +1734,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_AUX, .load_mask = CM_PLLH_LOADAUX, .hold_mask = 0, @@ -160,7 +160,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( .name = "pllh_pix", .source_pll = "pllh", -@@ -1728,7 +1741,8 @@ static const struct bcm2835_clk_desc clk +@@ -1730,7 +1743,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_PIX, .load_mask = CM_PLLH_LOADPIX, .hold_mask = 0, |