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Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0431-clk-bcm2835-Mark-the-CM-SDRAM-clock-s-parent-as-crit.patch')
-rw-r--r--target/linux/brcm2708/patches-4.4/0431-clk-bcm2835-Mark-the-CM-SDRAM-clock-s-parent-as-crit.patch73
1 files changed, 0 insertions, 73 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0431-clk-bcm2835-Mark-the-CM-SDRAM-clock-s-parent-as-crit.patch b/target/linux/brcm2708/patches-4.4/0431-clk-bcm2835-Mark-the-CM-SDRAM-clock-s-parent-as-crit.patch
deleted file mode 100644
index e3c7f5a6bd..0000000000
--- a/target/linux/brcm2708/patches-4.4/0431-clk-bcm2835-Mark-the-CM-SDRAM-clock-s-parent-as-crit.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From f863897ded282644de97eb600ccb596b7d58abab Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 1 Jun 2016 12:05:35 -0700
-Subject: [PATCH] clk: bcm2835: Mark the CM SDRAM clock's parent as critical
-
-While the SDRAM is being driven by its dedicated PLL most of the time,
-there is a little loop running in the firmware that periodically turns
-on the CM SDRAM clock (using its pre-initialized parent) and switches
-SDRAM to using the CM clock to do PVT recalibration.
-
-This avoids system hangs if we choose SDRAM's parent for some other
-clock, then disable that clock.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -36,6 +36,7 @@
-
- #include <linux/clk-provider.h>
- #include <linux/clkdev.h>
-+#include <linux/clk.h>
- #include <linux/clk/bcm2835.h>
- #include <linux/debugfs.h>
- #include <linux/module.h>
-@@ -1841,6 +1842,25 @@ static const struct bcm2835_clk_desc clk
- .ctl_reg = CM_PERIICTL),
- };
-
-+/*
-+ * Permanently take a reference on the parent of the SDRAM clock.
-+ *
-+ * While the SDRAM is being driven by its dedicated PLL most of the
-+ * time, there is a little loop running in the firmware that
-+ * periodically switches the SDRAM to using our CM clock to do PVT
-+ * recalibration, with the assumption that the previously configured
-+ * SDRAM parent is still enabled and running.
-+ */
-+static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)
-+{
-+ struct clk *parent = clk_get_parent(sdc);
-+
-+ if (IS_ERR(parent))
-+ return PTR_ERR(parent);
-+
-+ return clk_prepare_enable(parent);
-+}
-+
- static int bcm2835_clk_probe(struct platform_device *pdev)
- {
- struct device *dev = &pdev->dev;
-@@ -1850,6 +1870,7 @@ static int bcm2835_clk_probe(struct plat
- const struct bcm2835_clk_desc *desc;
- const size_t asize = ARRAY_SIZE(clk_desc_array);
- size_t i;
-+ int ret;
-
- cprman = devm_kzalloc(dev,
- sizeof(*cprman) + asize * sizeof(*clks),
-@@ -1880,6 +1901,10 @@ static int bcm2835_clk_probe(struct plat
- clks[i] = desc->clk_register(cprman, desc->data);
- }
-
-+ ret = bcm2835_mark_sdc_parent_critical(clks[BCM2835_CLOCK_SDRAM]);
-+ if (ret)
-+ return ret;
-+
- return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
- &cprman->onecell);
- }