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Diffstat (limited to 'target/linux/ath79/patches-4.14/0035-MIPS-ath79-fix-QCA956x-boot.patch')
-rw-r--r--target/linux/ath79/patches-4.14/0035-MIPS-ath79-fix-QCA956x-boot.patch17
1 files changed, 0 insertions, 17 deletions
diff --git a/target/linux/ath79/patches-4.14/0035-MIPS-ath79-fix-QCA956x-boot.patch b/target/linux/ath79/patches-4.14/0035-MIPS-ath79-fix-QCA956x-boot.patch
deleted file mode 100644
index c3dd676d4d..0000000000
--- a/target/linux/ath79/patches-4.14/0035-MIPS-ath79-fix-QCA956x-boot.patch
+++ /dev/null
@@ -1,17 +0,0 @@
---- a/arch/mips/ath79/clock.c
-+++ b/arch/mips/ath79/clock.c
-@@ -525,6 +525,14 @@ static void __init qca956x_clocks_init(v
- u32 cpu_pll, ddr_pll;
- u32 bootstrap;
-
-+ /* QCA956x timer init workaround has to be applied right before setting
-+ * up the clock. Else, there will be no jiffies */
-+ u32 misc;
-+
-+ misc = ath79_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
-+ misc |= MISC_INT_MIPS_SI_TIMERINT_MASK;
-+ ath79_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, misc);
-+
- bootstrap = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP);
- if (bootstrap & QCA956X_BOOTSTRAP_REF_CLK_40)
- ref_rate = 40 * 1000 * 1000;