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-rw-r--r--target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts184
1 files changed, 184 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts b/target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts
new file mode 100644
index 0000000000..0f276c110d
--- /dev/null
+++ b/target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7240.dtsi"
+
+/ {
+ compatible = "engenius,enh202-v1", "qca,ar7240";
+ model = "EnGenius ENH202 v1";
+
+ aliases {
+ led-boot = &led_rssihigh;
+ led-failsafe = &led_rssihigh;
+ led-running = &led_rssihigh;
+ led-upgrade = &led_rssihigh;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&jtag_disable_pins &switch_led_disable_pins &clks_disable_pins>;
+
+ rssilow {
+ label = "enh202-v1:red:rssilow";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ };
+
+ rssimedium {
+ label = "enh202-v1:amber:rssimedium";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led_rssihigh: rssihigh {
+ label = "enh202-v1:green:rssihigh";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ };
+
+ lan {
+ label = "enh202-v1:amber:lan";
+ gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+ };
+
+ wan {
+ label = "enh202-v1:green:wan";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ ath9k-leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ label = "enh202-v1:green:wlan";
+ gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+ };
+
+ virtual_flash {
+ compatible = "mtd-concat";
+
+ devices = <&firmware1 &firmware2>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ compatible = "openwrt,okli";
+ label = "firmware";
+ reg = <0x0 0x0>;
+ };
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+
+ num-cs = <1>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x40000 0x10000>;
+ };
+
+ partition@50000 {
+ label = "custom";
+ reg = <0x50000 0x50000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "loader";
+ reg = <0xa0000 0x10000>;
+ read-only;
+ };
+
+ firmware2: partition@b0000 {
+ label = "firmware2";
+ reg = <0xb0000 0xf0000>;
+ };
+
+ partition@1a0000 {
+ label = "fakeroot";
+ reg = <0x1a0000 0x10000>;
+ };
+
+ firmware1: partition@1b0000 {
+ label = "firmware1";
+ reg = <0x1b0000 0x4c0000>;
+ };
+
+ partition@670000 {
+ label = "failsafe";
+ reg = <0x670000 0x180000>;
+ read-only;
+ };
+
+ art: partition@7f0000 {
+ label = "art";
+ reg = <0x7f0000 0x10000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&eth0 {
+ mtd-mac-address = <&art 0x0>;
+};
+
+&eth1 {
+ status = "okay";
+
+ mtd-mac-address = <&art 0x0>;
+};
+
+&pcie {
+ status = "okay";
+
+ ath9k: wifi@0,0 {
+ compatible = "pci168c,002a";
+ reg = <0x0000 0 0 0 0>;
+ qca,no-eeprom;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+};