diff options
Diffstat (limited to 'target/linux/at91/patches-5.10/223-ARM-at91-pm-do-not-panic-if-ram-controllers-are-not-.patch')
| -rw-r--r-- | target/linux/at91/patches-5.10/223-ARM-at91-pm-do-not-panic-if-ram-controllers-are-not-.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/223-ARM-at91-pm-do-not-panic-if-ram-controllers-are-not-.patch b/target/linux/at91/patches-5.10/223-ARM-at91-pm-do-not-panic-if-ram-controllers-are-not-.patch new file mode 100644 index 0000000000..302d0e3752 --- /dev/null +++ b/target/linux/at91/patches-5.10/223-ARM-at91-pm-do-not-panic-if-ram-controllers-are-not-.patch @@ -0,0 +1,79 @@ +From 76dbc56ad65350d78d12bd9b36b00c36fb27addf Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Mon, 23 Aug 2021 16:19:12 +0300 +Subject: [PATCH 223/247] ARM: at91: pm: do not panic if ram controllers are + not enabled + +In case PM is enabled but there is no RAM controller information +in DT the code will panic. Avoid such scenarios by not initializing +platform specific PM code in case RAM controller is not provided +via DT. + +Reported-by: Eugen Hristev <eugen.hristev@microchip.com> +Fixes: 827de1f123ba0 ("ARM: at91: remove at91_dt_initialize and machine init_early()") +Fixes: 892e1f4a3ae58 ("ARM: at91: pm: add sama7g5 ddr phy controller") +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> +Link: https://lore.kernel.org/r/20210823131915.23857-2-claudiu.beznea@microchip.com +--- + arch/arm/mach-at91/pm.c | 22 ++++++++++++++++------ + 1 file changed, 16 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c +index a07e14d89ba4..d92afca64b49 100644 +--- a/arch/arm/mach-at91/pm.c ++++ b/arch/arm/mach-at91/pm.c +@@ -589,7 +589,7 @@ static const struct of_device_id ramc_phy_ids[] __initconst = { + { /* Sentinel. */ }, + }; + +-static __init void at91_dt_ramc(bool phy_mandatory) ++static __init int at91_dt_ramc(bool phy_mandatory) + { + struct device_node *np; + const struct of_device_id *of_id; +@@ -625,12 +625,18 @@ static __init void at91_dt_ramc(bool phy_mandatory) + /* Lookup for DDR PHY node, if any. */ + for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) { + soc_pm.data.ramc_phy = of_iomap(np, 0); +- if (!soc_pm.data.ramc_phy) +- panic(pr_fmt("unable to map ramc phy cpu registers\n")); ++ if (!soc_pm.data.ramc_phy) { ++ pr_err("unable to map ramc phy cpu registers\n"); ++ ret = -ENOMEM; ++ goto unmap_ramc; ++ } + } + +- if (phy_mandatory && !soc_pm.data.ramc_phy) +- panic(pr_fmt("DDR PHY is mandatory!\n")); ++ if (phy_mandatory && !soc_pm.data.ramc_phy) { ++ pr_err("DDR PHY is mandatory!\n"); ++ ret = -ENODEV; ++ goto unmap_ramc; ++ } + + if (!standby) { + pr_warn("ramc no standby function available\n"); +@@ -1163,13 +1169,17 @@ void __init sama7_pm_init(void) + [AT91_PM_BACKUP] = AT91_PM_IOMAP(SFRBU) | + AT91_PM_IOMAP(SHDWC), + }; ++ int ret; + + if (!IS_ENABLED(CONFIG_SOC_SAMA7)) + return; + + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); + +- at91_dt_ramc(true); ++ ret = at91_dt_ramc(true); ++ if (ret) ++ return; ++ + at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps)); + at91_pm_init(NULL); + +-- +2.32.0 + |