1 files changed, 95 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch b/target/linux/at91/patches-5.10/114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch
new file mode 100644
index 0000000000..f13be0bfd7
--- /dev/null
+++ b/target/linux/at91/patches-5.10/114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch
@@ -0,0 +1,95 @@
+From 9997227090cf529675aeb775585ec9f6c2f0f131 Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Thu, 19 Aug 2021 15:32:37 -0700
+Subject: [PATCH 114/247] clk: at91: sama7g5: remove all kernel-doc &
+ kernel-doc warnings
+
+Remove all "/**" kernel-doc markers from sama7g5.c since they are
+all internal to this driver source file only.
+This eliminates 14 warnings that were reported by the kernel test robot.
+
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Reported-by: kernel test robot <lkp@intel.com>
+Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
+Cc: Michael Turquette <mturquette@baylibre.com>
+Cc: Stephen Boyd <sboyd@kernel.org>
+Cc: Eugen Hristev <eugen.hristev@microchip.com>
+Cc: linux-clk@vger.kernel.org
+Cc: linux-arm-kernel@lists.infradead.org
+Link: https://lore.kernel.org/r/20210819223237.20115-1-rdunlap@infradead.org
+Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/at91/sama7g5.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
+index 9e1ec48c4474..cf8c079aa086 100644
+--- a/drivers/clk/at91/sama7g5.c
++++ b/drivers/clk/at91/sama7g5.c
+@@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
+ static DEFINE_SPINLOCK(pmc_mck0_lock);
+ static DEFINE_SPINLOCK(pmc_mckX_lock);
+ 
+-/**
++/*
+  * PLL clocks identifiers
+  * @PLL_ID_CPU:		CPU PLL identifier
+  * @PLL_ID_SYS:		System PLL identifier
+@@ -56,7 +56,7 @@ enum pll_ids {
+ 	PLL_ID_MAX,
+ };
+ 
+-/**
++/*
+  * PLL type identifiers
+  * @PLL_TYPE_FRAC:	fractional PLL identifier
+  * @PLL_TYPE_DIV:	divider PLL identifier
+@@ -118,7 +118,7 @@ static const struct clk_pll_characteristics pll_characteristics = {
+ 	.output = pll_outputs,
+ };
+ 
+-/**
++/*
+  * PLL clocks description
+  * @n:		clock name
+  * @p:		clock parent
+@@ -285,7 +285,7 @@ static const struct {
+ 	},
+ };
+ 
+-/**
++/*
+  * Master clock (MCK[1..4]) description
+  * @n:			clock name
+  * @ep:			extra parents names array
+@@ -337,7 +337,7 @@ static const struct {
+ 	  .c = 1, },
+ };
+ 
+-/**
++/*
+  * System clock description
+  * @n:	clock name
+  * @p:	clock parent name
+@@ -361,7 +361,7 @@ static const struct {
+ /* Mux table for programmable clocks. */
+ static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
+ 
+-/**
++/*
+  * Peripheral clock description
+  * @n:		clock name
+  * @p:		clock parent name
+@@ -449,7 +449,7 @@ static const struct {
+ 	{ .n = "uhphs_clk",	.p = "mck1", .id = 106, },
+ };
+ 
+-/**
++/*
+  * Generic clock description
+  * @n:			clock name
+  * @pp:			PLL parents
+-- 
+2.32.0
+