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-rw-r--r--target/linux/at91/patches-5.10/113-clk-at91-Trivial-typo-fixes-in-the-file-sama7g5.c.patch50
1 files changed, 50 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.10/113-clk-at91-Trivial-typo-fixes-in-the-file-sama7g5.c.patch b/target/linux/at91/patches-5.10/113-clk-at91-Trivial-typo-fixes-in-the-file-sama7g5.c.patch
new file mode 100644
index 0000000000..9f8c67942e
--- /dev/null
+++ b/target/linux/at91/patches-5.10/113-clk-at91-Trivial-typo-fixes-in-the-file-sama7g5.c.patch
@@ -0,0 +1,50 @@
+From 268b36c42b7d1e480dd56ecfec626a46f4b5975e Mon Sep 17 00:00:00 2001
+From: Bhaskar Chowdhury <unixbhaskar@gmail.com>
+Date: Sat, 13 Mar 2021 11:02:22 +0530
+Subject: [PATCH 113/247] clk: at91: Trivial typo fixes in the file sama7g5.c
+
+s/critial/critical/ ......two different places
+s/parrent/parent/
+
+Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
+Link: https://lore.kernel.org/r/20210313053222.14706-1-unixbhaskar@gmail.com
+Acked-by: Randy Dunlap <rdunlap@infradead.org>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/at91/sama7g5.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
+index a6e20b35960e..9e1ec48c4474 100644
+--- a/drivers/clk/at91/sama7g5.c
++++ b/drivers/clk/at91/sama7g5.c
+@@ -166,7 +166,7 @@ static const struct {
+ .c = &pll_characteristics,
+ .t = PLL_TYPE_FRAC,
+ /*
+- * This feeds syspll_divpmcck which may feed critial parts
++ * This feeds syspll_divpmcck which may feed critical parts
+ * of the systems like timers. Therefore it should not be
+ * disabled.
+ */
+@@ -178,7 +178,7 @@ static const struct {
+ .c = &pll_characteristics,
+ .t = PLL_TYPE_DIV,
+ /*
+- * This may feed critial parts of the systems like timers.
++ * This may feed critical parts of the systems like timers.
+ * Therefore it should not be disabled.
+ */
+ .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
+@@ -455,7 +455,7 @@ static const struct {
+ * @pp: PLL parents
+ * @pp_mux_table: PLL parents mux table
+ * @r: clock output range
+- * @pp_chg_id: id in parrent array of changeable PLL parent
++ * @pp_chg_id: id in parent array of changeable PLL parent
+ * @pp_count: PLL parents count
+ * @id: clock id
+ */
+--
+2.32.0
+