diff options
Diffstat (limited to 'target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch index dff354398c..6573b298a5 100644 --- a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch @@ -11,7 +11,7 @@ #define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) #define QCA956X_GMAC_SIZE 0x64 -@@ -404,6 +408,7 @@ +@@ -411,6 +415,7 @@ #define QCA956X_PLL_DDR_CONFIG_REG 0x08 #define QCA956X_PLL_DDR_CONFIG1_REG 0x0c #define QCA956X_PLL_CLK_CTRL_REG 0x10 @@ -19,7 +19,7 @@ #define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 #define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -@@ -1186,4 +1191,16 @@ +@@ -1193,4 +1198,16 @@ #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 |