diff options
Diffstat (limited to 'package/kernel/mac80211/patches/304-ath9k-Fix-RTC_DERIVED_CLK-usage.patch')
| -rw-r--r-- | package/kernel/mac80211/patches/304-ath9k-Fix-RTC_DERIVED_CLK-usage.patch | 61 |
1 files changed, 0 insertions, 61 deletions
diff --git a/package/kernel/mac80211/patches/304-ath9k-Fix-RTC_DERIVED_CLK-usage.patch b/package/kernel/mac80211/patches/304-ath9k-Fix-RTC_DERIVED_CLK-usage.patch deleted file mode 100644 index a9205c0536..0000000000 --- a/package/kernel/mac80211/patches/304-ath9k-Fix-RTC_DERIVED_CLK-usage.patch +++ /dev/null @@ -1,61 +0,0 @@ -From: Miaoqing Pan <miaoqing@qca.qualcomm.com> -Date: Thu, 6 Nov 2014 10:52:23 +0530 -Subject: [PATCH] ath9k: Fix RTC_DERIVED_CLK usage - -Based on the reference clock, which could be 25MHz or 40MHz, -AR_RTC_DERIVED_CLK is programmed differently for AR9340 and AR9550. -But, when a chip reset is done, processing the initvals -sets the register back to the default value. - -Fix this by moving the code in ath9k_hw_init_pll() to -ar9003_hw_override_ini(). Also, do this override for AR9531. - -Cc: stable@vger.kernel.org -Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com> -Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> ---- - ---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c -+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c -@@ -664,6 +664,19 @@ static void ar9003_hw_override_ini(struc - ah->enabled_cals |= TX_CL_CAL; - else - ah->enabled_cals &= ~TX_CL_CAL; -+ -+ if (AR_SREV_9340(ah) || AR_SREV_9531(ah) || AR_SREV_9550(ah)) { -+ if (ah->is_clk_25mhz) { -+ REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1); -+ REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7); -+ REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae); -+ } else { -+ REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1); -+ REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400); -+ REG_WRITE(ah, AR_SLP32_INC, 0x0001e800); -+ } -+ udelay(100); -+ } - } - - static void ar9003_hw_prog_ini(struct ath_hw *ah, ---- a/drivers/net/wireless/ath/ath9k/hw.c -+++ b/drivers/net/wireless/ath/ath9k/hw.c -@@ -870,19 +870,6 @@ static void ath9k_hw_init_pll(struct ath - udelay(RTC_PLL_SETTLE_DELAY); - - REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK); -- -- if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) { -- if (ah->is_clk_25mhz) { -- REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1); -- REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7); -- REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae); -- } else { -- REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1); -- REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400); -- REG_WRITE(ah, AR_SLP32_INC, 0x0001e800); -- } -- udelay(100); -- } - } - - static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah, |